From: Wolfram Sang <wsa@kernel.org>
To: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
andriy.shevchenko@linux.intel.com, krzk@kernel.org,
jarkko.nikula@linux.intel.com, robh@kernel.org,
semen.protsenko@linaro.org, sven@svenpeter.dev, jsd@semihalf.com,
rafal@milecki.pl, olof@lixom.net, arnd@arndb.de,
UNGLinuxDriver@microchip.com
Subject: Re: [PATCH v4 i2c-master] i2c: microchip: pci1xxxx: Add driver for I2C host controller in multifunction endpoint of pci1xxxx switch
Date: Sat, 17 Sep 2022 23:01:48 +0200 [thread overview]
Message-ID: <YyY1vESf5JalT6GR@shikoro> (raw)
In-Reply-To: <20220907161143.897289-1-tharunkumar.pasumarthi@microchip.com>
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Hi,
On Wed, Sep 07, 2022 at 09:41:43PM +0530, Tharun Kumar P wrote:
> Microchip pci1xxxx is an unmanaged PCIe3.1a Switch for Consumer,
> Industrial and Automotive applications. This switch has multiple
> downstream ports. In one of the Switch's Downstream port, there
> is a multifunction endpoint for peripherals which includes an I2C
> host controller. The I2C function in the endpoint operates at 100KHz,
> 400KHz and 1 MHz and has buffer depth of 128 bytes.
> This patch provides the I2C controller driver for the I2C function
> of the switch.
>
> Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
Thank you for the driver and thanks to Andy for reviewing it this far.
He is right, some nits are there which can be fixed later. But a few
things I need to comment on:
> +static u32 pci1xxxx_i2c_get_funcs(struct i2c_adapter *adap)
> +{
> + return I2C_FUNC_I2C | I2C_FUNC_PROTOCOL_MANGLING |
> + I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
> + I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE |
> + I2C_FUNC_SMBUS_READ_BYTE_DATA |
> + I2C_FUNC_SMBUS_WRITE_BYTE_DATA |
> + I2C_FUNC_SMBUS_READ_WORD_DATA |
> + I2C_FUNC_SMBUS_WRITE_WORD_DATA |
> + I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_READ_BLOCK_DATA |
> + I2C_FUNC_SMBUS_WRITE_BLOCK_DATA;
> +}
If you can't do I2C_FUNC_SMBUS_QUICK, then you need an i2c_adapter_quirk
struct saying that your HW cannot do 0 byte length transfers.
Also, a lot can be simplified here, e.g. I2C_FUNC_SMBUS_BYTE covers both
cases, read and write.
...
> + /* Register the isr. We are not using any isr flags here. */
Why not use then simply 0 instead of a define and a comment?
> + ret = devm_request_irq(dev, pci_irq_vector(pdev, 0), pci1xxxx_i2c_isr,
> + PCI1XXXX_IRQ_FLAGS, pci_name(pdev), i2c);
> + if (ret)
> + return ret;
> +
> + i2c->adap = pci1xxxx_i2c_ops;
> + i2c->adap.class = I2C_CLASS_SPD;
I need to make sure: do you intentionally want autoprobing for SPD? I
ask because it could be needed but it costs boottime when not needed.
And changing the class once exposed is troublesome.
Happy hacking,
Wolfram
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next prev parent reply other threads:[~2022-09-17 21:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-07 16:11 [PATCH v4 i2c-master] i2c: microchip: pci1xxxx: Add driver for I2C host controller in multifunction endpoint of pci1xxxx switch Tharun Kumar P
2022-09-07 16:32 ` Andy Shevchenko
2022-09-16 9:04 ` Tharunkumar.Pasumarthi
2022-09-17 21:02 ` Wolfram Sang
2022-09-17 21:01 ` Wolfram Sang [this message]
2022-09-23 13:51 ` Tharunkumar.Pasumarthi
2022-09-23 16:24 ` Wolfram Sang
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