From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9009AC433FE for ; Sun, 2 Oct 2022 22:15:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229731AbiJBWPt (ORCPT ); Sun, 2 Oct 2022 18:15:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229483AbiJBWPr (ORCPT ); Sun, 2 Oct 2022 18:15:47 -0400 Received: from mail.skyhub.de (mail.skyhub.de [5.9.137.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0227D2B279 for ; Sun, 2 Oct 2022 15:15:43 -0700 (PDT) Received: from zn.tnic (p200300ea9733e749329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ea:9733:e749:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 6655D1EC0531; Mon, 3 Oct 2022 00:15:38 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1664748938; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=+fEQQb5lD02Y6YzWGCz/ffqbL9SXmafxj2PD7oyWANU=; b=fI/LJMtc+GsPe7fQq0tSHOQ8Bw5jIk4tXz8n3tyouixoQVzmQk+CMJ5bd5//EIBsq5py7X prCzc13wIgWNQXdynWNXRRIOKtuPnp2TMLAKAC4z6nSInp0gOTPbd2n8rivPGOkU3lucly dihO6YYxTzZGsn2e0xvqc/Yr2nHH6BY= Date: Mon, 3 Oct 2022 00:15:32 +0200 From: Borislav Petkov To: Ricardo Neri Cc: "Peter Zijlstra (Intel)" , Juri Lelli , Vincent Guittot , Ricardo Neri , "Ravi V. Shankar" , Ben Segall , Daniel Bristot de Oliveira , Dietmar Eggemann , Len Brown , Mel Gorman , "Rafael J. Wysocki" , Srinivas Pandruvada , Steven Rostedt , Tim Chen , Valentin Schneider , x86@kernel.org, linux-kernel@vger.kernel.org, "Tim C . Chen" Subject: Re: [RFC PATCH 23/23] x86/process: Reset hardware history in context switch Message-ID: References: <20220909231205.14009-1-ricardo.neri-calderon@linux.intel.com> <20220909231205.14009-24-ricardo.neri-calderon@linux.intel.com> <20221002221238.GB17545@ranerica-svr.sc.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20221002221238.GB17545@ranerica-svr.sc.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Oct 02, 2022 at 03:12:38PM -0700, Ricardo Neri wrote: > Sure I can do this, Boris. I guess this implies that I also need to > add the DISABLE_MASK bits. Are you adding a CONFIG_ item which can control the DISABLE_MASK bit too? > Othewise, IIUC, cpu_feature_enabled() falls back to static_cpu_has(). And? -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette