From: Chao Gao <chao.gao@intel.com>
To: "Chang S. Bae" <chang.seok.bae@intel.com>
Cc: <linux-kernel@vger.kernel.org>, <x86@kernel.org>,
<tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <colinmitchell@google.com>
Subject: Re: [PATCH v3 5/6] x86/microcode/intel: Support mailbox transfer
Date: Wed, 16 Apr 2025 22:14:19 +0800 [thread overview]
Message-ID: <Z/+7O6pYQ8FkD+Xj@intel.com> (raw)
In-Reply-To: <20250409232713.4536-6-chang.seok.bae@intel.com>
>+/*
>+ * Wait for the hardware to complete a transaction.
>+ * Return true on success, false on failure.
>+ */
>+static bool wait_for_transaction(struct staging_state *ss)
>+{
>+ u32 timeout, status;
>+
>+ /* Allow time for hardware to complete the operation: */
>+ for (timeout = 0; timeout < MBOX_XACTION_TIMEOUT_MS; timeout++) {
>+ msleep(1);
>+
>+ status = readl(ss->mmio_base + MBOX_STATUS_OFFSET);
>+ /* Break out early if the hardware is ready: */
>+ if (status & MASK_MBOX_STATUS_READY)
>+ break;
Shouldn't we exit the loop if the MASK_MBOX_STATUS_ERROR is set, or is the
ERROR bit always set in conjunction with the READY bit?
>+ }
>+
>+ status = readl(ss->mmio_base + MBOX_STATUS_OFFSET);
I still think this read is not needed.
>+
>+ /* Check for explicit error response */
>+ if (status & MASK_MBOX_STATUS_ERROR) {
>+ ss->state = UCODE_ERROR;
>+ return false;
>+ }
>+
>+ /*
>+ * Hardware is neither responded to the action nor
>+ * signaled any error. Treat the case as timeout.
>+ */
>+ if (!(status & MASK_MBOX_STATUS_READY)) {
>+ ss->state = UCODE_TIMEOUT;
>+ return false;
>+ }
>+
>+ ss->state = UCODE_OK;
>+ return true;
>+}
next prev parent reply other threads:[~2025-04-16 14:14 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-20 23:40 [PATCH v2 0/6] x86: Support for Intel Microcode Staging Feature Chang S. Bae
2025-03-20 23:40 ` [PATCH v2 1/6] x86/microcode: Introduce staging step to reduce late-loading time Chang S. Bae
2025-03-20 23:40 ` [PATCH v2 2/6] x86/microcode/intel: Define staging state struct Chang S. Bae
2025-03-20 23:40 ` [PATCH v2 3/6] x86/microcode/intel: Establish staging control logic Chang S. Bae
2025-03-21 21:18 ` [PATCH v2a " Chang S. Bae
2025-03-26 7:35 ` Chao Gao
2025-03-26 18:43 ` Chang S. Bae
2025-03-27 1:44 ` Chao Gao
2025-03-28 14:12 ` Chang S. Bae
2025-03-20 23:40 ` [PATCH v2 4/6] x86/microcode/intel: Implement staging handler Chang S. Bae
2025-03-21 0:15 ` Dave Hansen
2025-03-21 21:19 ` [PATCH v2a " Chang S. Bae
2025-03-26 8:34 ` Chao Gao
2025-03-26 18:43 ` Chang S. Bae
2025-03-21 21:19 ` [PATCH v2 " Chang S. Bae
2025-03-20 23:40 ` [PATCH v2 5/6] x86/microcode/intel: Support mailbox transfer Chang S. Bae
2025-03-21 21:19 ` [PATCH v2a " Chang S. Bae
2025-03-27 3:32 ` [PATCH v2 " Chao Gao
2025-03-27 14:11 ` Chang S. Bae
2025-03-31 19:16 ` Dave Hansen
2025-03-20 23:40 ` [PATCH v2 6/6] x86/microcode/intel: Enable staging when available Chang S. Bae
2025-04-09 23:27 ` [PATCH v3 0/6] x86: Support for Intel Microcode Staging Feature Chang S. Bae
2025-04-09 23:27 ` [PATCH v3 1/6] x86/microcode: Introduce staging step to reduce late-loading time Chang S. Bae
2025-04-09 23:27 ` [PATCH v3 2/6] x86/microcode/intel: Establish staging control logic Chang S. Bae
2025-04-09 23:27 ` [PATCH v3 3/6] x86/microcode/intel: Define staging state struct Chang S. Bae
2025-04-09 23:27 ` [PATCH v3 4/6] x86/microcode/intel: Implement staging handler Chang S. Bae
2025-04-09 23:27 ` [PATCH v3 5/6] x86/microcode/intel: Support mailbox transfer Chang S. Bae
2025-04-16 14:14 ` Chao Gao [this message]
2025-04-16 17:22 ` Chang S. Bae
2025-04-16 17:37 ` Dave Hansen
2025-04-09 23:27 ` [PATCH v3 6/6] x86/microcode/intel: Enable staging when available Chang S. Bae
2025-08-13 17:26 ` [PATCH v4 0/6] x86: Support for Intel Microcode Staging Feature Chang S. Bae
2025-08-13 17:26 ` [PATCH v4 1/6] x86/microcode: Introduce staging step to reduce late-loading time Chang S. Bae
2025-08-18 7:45 ` Chao Gao
2025-08-13 17:26 ` [PATCH v4 2/6] x86/microcode/intel: Establish staging control logic Chang S. Bae
2025-08-13 18:21 ` Dave Hansen
2025-08-13 20:46 ` Chang S. Bae
2025-08-13 20:55 ` Dave Hansen
2025-08-14 18:30 ` Chang S. Bae
2025-08-22 22:39 ` [PATCH] x86/cpu/topology: Make primary thread mask available with SMP=n Chang S. Bae
2025-08-23 16:05 ` Chang S. Bae
2025-08-22 22:39 ` [PATCH v4a 2/6] x86/microcode/intel: Establish staging control logic Chang S. Bae
2025-08-22 23:34 ` Dave Hansen
2025-08-13 17:26 ` [PATCH v4 3/6] x86/microcode/intel: Define staging state struct Chang S. Bae
2025-08-13 18:25 ` Dave Hansen
2025-08-22 22:39 ` [PATCH v4a " Chang S. Bae
2025-08-13 17:26 ` [PATCH v4 4/6] x86/microcode/intel: Implement staging handler Chang S. Bae
2025-08-13 18:44 ` Dave Hansen
2025-08-22 22:39 ` [PATCH v4a " Chang S. Bae
2025-08-13 17:26 ` [PATCH v4 5/6] x86/microcode/intel: Support mailbox transfer Chang S. Bae
2025-08-13 19:07 ` Dave Hansen
2025-08-22 22:40 ` [PATCH v4a " Chang S. Bae
2025-08-13 17:26 ` [PATCH v4 6/6] x86/microcode/intel: Enable staging when available Chang S. Bae
2025-08-18 8:35 ` Chao Gao
2025-08-22 22:42 ` Chang S. Bae
2025-08-13 19:08 ` [PATCH v4 0/6] x86: Support for Intel Microcode Staging Feature Dave Hansen
2025-08-23 15:52 ` [PATCH v5 0/7] " Chang S. Bae
2025-08-23 15:52 ` [PATCH v5 1/7] x86/cpu/topology: Make primary thread mask available with SMP=n Chang S. Bae
2025-08-23 15:52 ` [PATCH v5 2/7] x86/microcode: Introduce staging step to reduce late-loading time Chang S. Bae
2025-09-04 12:08 ` Borislav Petkov
2025-09-05 0:06 ` Chang S. Bae
2025-08-23 15:52 ` [PATCH v5 3/7] x86/microcode/intel: Establish staging control logic Chang S. Bae
2025-09-04 12:13 ` Borislav Petkov
2025-09-05 0:04 ` Chang S. Bae
2025-08-23 15:52 ` [PATCH v5 4/7] x86/microcode/intel: Define staging state struct Chang S. Bae
2025-09-04 13:48 ` Borislav Petkov
2025-09-05 0:05 ` Chang S. Bae
2025-08-23 15:52 ` [PATCH v5 5/7] x86/microcode/intel: Implement staging handler Chang S. Bae
2025-08-23 15:52 ` [PATCH v5 6/7] x86/microcode/intel: Support mailbox transfer Chang S. Bae
2025-08-23 15:52 ` [PATCH v5 7/7] x86/microcode/intel: Enable staging when available Chang S. Bae
2025-08-26 22:13 ` [PATCH v5 0/7] x86: Support for Intel Microcode Staging Feature Luck, Tony
2025-08-26 22:15 ` Chang S. Bae
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