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X-OriginatorOrg: opensource.cirrus.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Apr 2025 09:41:33.7582 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 90a97e15-fed3-4ebd-e056-08dd7ccae008 X-MS-Exchange-CrossTenant-Id: bec09025-e5bc-40d1-a355-8e955c307de8 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=bec09025-e5bc-40d1-a355-8e955c307de8;Ip=[84.19.233.75];Helo=[edirelay1.ad.cirrus.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR19MB8854 X-Proofpoint-GUID: YuGBC_zUff9_EmWT5o7mvdL-_DcYVC9g X-Proofpoint-ORIG-GUID: YuGBC_zUff9_EmWT5o7mvdL-_DcYVC9g X-Authority-Analysis: v=2.4 cv=OeuYDgTY c=1 sm=1 tr=0 ts=67ff7b54 cx=c_pps a=joO5rFOndlhnht97C4Lqsw==:117 a=h1hSm8JtM9GN1ddwPAif2w==:17 a=wKuvFiaSGQ0qltdbU6+NXLB8nM8=:19 a=Ol13hO9ccFRV9qXi2t6ftBPywas=:19 a=kj9zAlcOel0A:10 a=XR8D0OoHHMoA:10 a=s63m1ICgrNkA:10 a=RWc_ulEos4gA:10 a=yDhs5JWqyVeKaxjYFQEA:9 a=CjuIK1q_8ugA:10 a=BGLuxUZjE2igh1l4FkT-:22 X-Proofpoint-Spam-Reason: safe On Mon, Apr 14, 2025 at 02:43:50PM -0500, Pierre-Louis Bossart wrote: > >> How would the state of those DAPM SU widgets be updated > >> though? I think we need to 'translate' the GE settings to tell > >> DAPM which paths can become active, but the SUs state is set > >> by hardware so I could see a possible racy disconnect if we > >> make a path activable but hardware hasn't done so yet. > > > > All the SU DAPM widgets are linked to the single GE control, > > the same ALSA control is shared across all the widgets. So > > all the paths are updated in a single DAPM sync, and on the > > hardware side with a single write to the GE control. > > The race I am concerned about is between SU values > represented in DAPM and actual values propagated inside the > SDCA device. There could be a delay between writing a GE > register and the SU register values changing. Fair enough, but I don't see why this matters. Those SU registers are device level, it is the devices business to manage them. Why does it matter if there is a delay updating them? All the widgets on the host side are controlled by the GE control. > > To put that as a more concrete example this code will create > > input widgets for IT 31, 32, 33 (the UAJ mics), however it > > would be unusual to hook a pin switch to those. Something > > should be creating an actual microphone widget, attaching > > that to the input widgets and attaching a pin switch to that. > > Typically those actions are handled in the machine driver, > > there is possibly an argument for handling them in the codec > > driver for SDCA but I felt it would make more sense to progress > > things a little further until resolving that one. > > The SDCA spec is supposed to describe what's physically > connected, so when we parse the DisCo descriptors we should > only see the level that is typically present in machine > drivers. That's not entirely true, none of the interconnections between codecs are contained. Microsoft invented that composition stuff to hold that sort of stuff. Although perhaps there is a strong case that the IT/OTs here are defined as having a mic/speaker connected so it is the right place to define them? > The codec descriptors are not generic at all, they > should only describe a specific way of how a SDCA codec is > used. The traditional split between codec and machine drivers > does not really apply for SDCA, the SDCA descriptors represent > the *machine* already. I guess that makes your opinion very much that we do add the mic/speaker widgets at this level. I mean it wouldn't take long to add them. I am still not totally as sure, but we can probably live with a little more effort to back it out if we need it. I will do a v4 and see what adding those in looks like. Thanks, Charles