Re: [PATCH v2 5/6] x86/microcode/intel: Support mailbox transfer

[Chao Gao <chao.gao@intel.com>]

>+/*
>+ * Wait for the hardware to complete a transaction.
>+ * Return true on success, false on failure.
>+ */
>+static bool wait_for_transaction(void)
>+{
>+	u32 timeout, status;
>+
>+	/* Allow time for hardware to complete the operation: */
>+	for (timeout = 0; timeout < MBOX_XACTION_TIMEOUT_MS; timeout++) {
>+		msleep(1);
>+
>+		status = readl(staging.mmio_base + MBOX_STATUS_OFFSET);
>+		/* Break out early if the hardware is ready: */
>+		if (status & MASK_MBOX_STATUS_READY)
>+			break;
>+	}
>+
>+	status = readl(staging.mmio_base + MBOX_STATUS_OFFSET);

why read the STATUS again?

>+
>+	/* Check for explicit error response */
>+	if (status & MASK_MBOX_STATUS_ERROR) {
>+		staging.state = UCODE_ERROR;
>+		return false;
>+	}
>+
>+	/*
>+	 * Hardware is neither responded to the action nor
>+	 * signaled any error. Treat the case as timeout.
>+	 */
>+	if (!(status & MASK_MBOX_STATUS_READY)) {
>+		staging.state = UCODE_TIMEOUT;
>+		return false;
>+	}
>+
>+	staging.state = UCODE_OK;
>+	return true;
>+}

How about:

static enum ucode_state wait_for_transaction(void)
{
	u32 timeout, status;

	/* Allow time for hardware to complete the operation: */
	for (timeout = 0; timeout < MBOX_XACTION_TIMEOUT_MS; timeout++) {
		msleep(1);

		status = readl(staging.mmio_base + MBOX_STATUS_OFFSET);

		if (status & MASK_MBOX_STATUS_READY)
			return UCODE_OK;

		/* Check for explicit error response */
		if (status & MASK_MBOX_STATUS_ERROR)
			return UCODE_ERROR;
	}

	/*
	 * Hardware is neither responded to the action nor
	 * signaled any error. Treat the case as timeout.
	 */
	return UCODE_TIMEOUT;
}

and in send_data_chunk(), do:

	staging.state = wait_for_transaction();
	return staging.state != UCODE_OK;

It is simpler and requires less code. Even better, send_data_chunk() can just
propagate the ucode_state to its caller.

By the way, checkpatch.pl warns that 'msleep < 20ms can sleep for up to 20ms;
see function description of msleep().' This makes me wonder how the 10ms
timeout was determined but not precisely enforced. Is it arbitrary or selected
for specific reasons?