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From: Ingo Molnar <mingo@kernel.org>
To: Josh Poimboeuf <jpoimboe@kernel.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, amit@kernel.org,
	kvm@vger.kernel.org, amit.shah@amd.com, thomas.lendacky@amd.com,
	bp@alien8.de, tglx@linutronix.de, peterz@infradead.org,
	pawan.kumar.gupta@linux.intel.com, corbet@lwn.net,
	mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com,
	seanjc@google.com, pbonzini@redhat.com,
	daniel.sneddon@linux.intel.com, kai.huang@intel.com,
	sandipan.das@amd.com, boris.ostrovsky@oracle.com,
	Babu.Moger@amd.com, david.kaplan@amd.com, dwmw@amazon.co.uk,
	andrew.cooper3@citrix.com
Subject: Re: [PATCH v3 6/6] x86/bugs: Add RSB mitigation document
Date: Wed, 2 Apr 2025 21:58:59 +0200	[thread overview]
Message-ID: <Z-2XAx9u8l-73aXM@gmail.com> (raw)
In-Reply-To: <d6c07c8ae337525cbb5d926d692e8969c2cf698d.1743617897.git.jpoimboe@kernel.org>


* Josh Poimboeuf <jpoimboe@kernel.org> wrote:

> Create a document to summarize hard-earned knowledge about RSB-related
> mitigations, with references, and replace the overly verbose yet
> incomplete comments with a reference to the document.

Just a few nits:

> +RSB poisoning (Intel and AMD)
> +=============================
> +
> +SpectreRSB
> +~~~~~~~~~~
>
>+
>+RSB poisoning is a technique used by Spectre-RSB [#spectre-rsb]_ where
>+an attacker poisons an RSB entry to cause a victim's return instruction
>+to speculate to an attacker-controlled address.  This can happen when
>+there are unbalanced CALLs/RETs after a context switch or VMEXIT.

s/Spectre-RSB
 /SpectreRSB

Which is the name the title just a few lines above uses, and which 
appears to be broadly the in-tree consensus spelling as well.

> +
> +AMD Retbleed / SRSO / Branch Type Confusion
> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Nit: the underline is one character too long. :-)

> +On AMD, poisoned RSB entries can also be created by the AMD Retbleed
> +variant [#retbleed-paper]_ and/or Speculative Return Stack Overflow
> +[#amd-srso]_ (Inception [#inception-paper]_).  These attacks are made
> +possible by Branch Type Confusion [#amd-btc]_.  The kernel protects
> +itself by replacing every RET in the kernel with a branch to a single
> +safe RET.

s/Retbleed
 /RETBleed

Seems to be the consensus spelling in-tree. (There's a few more cases 
in this document as well.)

> +	 * WARNING! There are many subtleties to consider when changing *any*
> +	 * code related to RSB-related mitigations.  Before doing so, carefully
> +	 * read the following document, and update if necessary:
>  	 *
> +	 *   Documentation/admin-guide/hw-vuln/rsb.rst
>  	 *
> +	 * In an overly simplified nutshell:
>  	 *
> +	 *   - User->user RSB attacks are conditionally mitigated during
> +	 *     context switch by cond_mitigation -> __write_ibpb().

s/during context switch
 /during context switches

>  	 *
> +	 *   - User->kernel and guest->host attacks are mitigated by eIBRS or
> +	 *     RSB filling.
>  	 *
> +	 *     Though, depending on config, note that other alternative
> +	 *     mitigations may end up getting used instead, e.g., IBPB on
> +	 *     entry/vmexit, call depth tracking, or return thunks.
>  	 */

s/__write_ibpb()
 /write_ibpb()

as per the discussion under patch #1.

Thanks,

	Ingo

  reply	other threads:[~2025-04-02 19:59 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-02 18:19 [PATCH v3 0/6] x86/bugs: RSB mitigation fixes and documentation Josh Poimboeuf
2025-04-02 18:19 ` [PATCH v3 1/6] x86/bugs: Rename entry_ibpb() Josh Poimboeuf
2025-04-02 18:29   ` Borislav Petkov
2025-04-02 18:44     ` Josh Poimboeuf
2025-04-02 18:48       ` Borislav Petkov
2025-04-02 19:37   ` Ingo Molnar
2025-04-03  0:34     ` Josh Poimboeuf
2025-04-02 18:19 ` [PATCH v3 2/6] x86/bugs: Use SBPB in __write_ibpb() if applicable Josh Poimboeuf
2025-04-02 20:41   ` Tom Lendacky
2025-04-03  2:12     ` Josh Poimboeuf
2025-04-02 21:04   ` Jim Mattson
2025-04-03  2:17     ` Josh Poimboeuf
2025-04-09 18:07       ` Jim Mattson
2025-04-09 18:29         ` Kaplan, David
2025-04-09 18:46           ` Jim Mattson
2025-04-02 18:19 ` [PATCH v3 3/6] x86/bugs: Fix RSB clearing in indirect_branch_prediction_barrier() Josh Poimboeuf
2025-04-04 14:45   ` Nikolay Borisov
2025-04-04 15:17     ` Josh Poimboeuf
2025-04-04 22:56       ` Nikolay Borisov
2025-04-05  0:56         ` Josh Poimboeuf
2025-04-08  7:15           ` Nikolay Borisov
2025-04-02 18:19 ` [PATCH v3 4/6] x86/bugs: Don't fill RSB on VMEXIT with eIBRS+retpoline Josh Poimboeuf
2025-04-08 13:50   ` Nikolay Borisov
2025-04-02 18:19 ` [PATCH v3 5/6] x86/bugs: Don't fill RSB on context switch with eIBRS Josh Poimboeuf
2025-04-08 13:51   ` Nikolay Borisov
2025-04-02 18:19 ` [PATCH v3 6/6] x86/bugs: Add RSB mitigation document Josh Poimboeuf
2025-04-02 19:58   ` Ingo Molnar [this message]
2025-04-03  0:38     ` Josh Poimboeuf
2025-04-03  2:57   ` Bagas Sanjaya
2025-04-03  7:48     ` Josh Poimboeuf
2025-04-04  2:39   ` Andrew Cooper
2025-04-04 19:30     ` Josh Poimboeuf

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