From: Ingo Molnar <mingo@kernel.org>
To: Uros Bizjak <ubizjak@gmail.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH 2/2] x86/bitops: Fix false output register dependency of TZCNT insn
Date: Tue, 25 Mar 2025 22:43:28 +0100 [thread overview]
Message-ID: <Z-MjgKSzJKIVooFI@gmail.com> (raw)
In-Reply-To: <20250325175215.330659-2-ubizjak@gmail.com>
* Uros Bizjak <ubizjak@gmail.com> wrote:
> On Haswell and later Intel processors, the TZCNT instruction appears
> to have a false dependency on the destination register. Even though
> the instruction only writes to it, the instruction will wait until
> destination is ready before executing. This false dependency
> was fixed for Skylake (and later) processors.
>
> Fix false dependency by clearing the destination register first.
>
> The x86_64 defconfig object size increases by 4215 bytes:
>
> text data bss dec hex filename
> 27342396 4642999 814852 32800247 1f47df7 vmlinux-old.o
> 27346611 4643015 814852 32804478 1f48e7e vmlinux-new.o
Yeah, so Skylake was released in 2015, about a decade ago.
So we'd be making the kernel larger for an unquantified
micro-optimization for CPUs that almost nobody uses anymore.
That's a bad trade-off.
Thanks,
Ingo
next prev parent reply other threads:[~2025-03-25 21:43 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-25 17:52 [PATCH 1/2] x86/bitops: Use TZCNT mnemonic in <asm/bitops.h> Uros Bizjak
2025-03-25 17:52 ` [PATCH 2/2] x86/bitops: Fix false output register dependency of TZCNT insn Uros Bizjak
2025-03-25 17:59 ` Borislav Petkov
2025-03-25 18:29 ` H. Peter Anvin
2025-03-25 21:43 ` Ingo Molnar [this message]
2025-03-26 8:46 ` Uros Bizjak
2025-03-28 22:27 ` Ingo Molnar
2025-03-29 8:48 ` Uros Bizjak
2025-03-25 21:48 ` [tip: x86/asm] x86/bitops: Use TZCNT mnemonic in <asm/bitops.h> tip-bot2 for Uros Bizjak
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