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From: Sean Christopherson <seanjc@google.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>,
	linux-kernel@vger.kernel.org, bp@alien8.de,  mingo@redhat.com,
	dave.hansen@linux.intel.com, Thomas.Lendacky@amd.com,
	 nikunj@amd.com, Santosh.Shukla@amd.com, Vasant.Hegde@amd.com,
	 Suravee.Suthikulpanit@amd.com, David.Kaplan@amd.com,
	x86@kernel.org,  hpa@zytor.com, peterz@infradead.org,
	pbonzini@redhat.com, kvm@vger.kernel.org,
	 kirill.shutemov@linux.intel.com, huibo.wang@amd.com,
	naveen.rao@amd.com
Subject: Re: [RFC v2 13/17] x86/apic: Handle EOI writes for SAVIC guests
Date: Thu, 27 Mar 2025 07:19:07 -0700	[thread overview]
Message-ID: <Z-VeW0IuqMI8dYlH@google.com> (raw)
In-Reply-To: <87msd6y8a7.ffs@tglx>

On Thu, Mar 27, 2025, Thomas Gleixner wrote:
> On Thu, Mar 27 2025 at 11:48, Thomas Gleixner wrote:
> 
> > On Fri, Mar 21 2025 at 10:11, Sean Christopherson wrote:
> >> On Fri, Mar 21, 2025, Thomas Gleixner wrote:
> >>> 
> >>> Congrats. You managed to re-implement find_last_bit() in the most
> >>> incomprehesible way.
> >>
> >> Heh, having burned myself quite badly by trying to use find_last_bit() to get
> >> pending/in-service IRQs in KVM code...
> >>
> >> Using find_last_bit() doesn't work because the ISR chunks aren't contiguous,
> >> they're 4-byte registers at 16-byte strides.
> >
> > Which is obvious to solve with trivial integer math:
> >
> >       bit = vector + 32 * (vector / 32);
> >
> > ergo
> >
> >      vector = bit - 16 * (bit / 32);
> >
> > No?
> 
> Actually no. As this is for 8 byte alignment. For 16 byte it's 
> 
> 	bit = vector + 96 * (vector / 32);
> ergo
>         vector = bit - 24 * (bit / 32);
> 
> Which is still just shifts and add/sub.

IIUC, the suggestion is to use find_last_bit() to walk the entire 128-byte range
covered by ISR registers, under the assumption that the holes are guaranteed to
be zero.  I suppose that works for Secure AVIC, but I don't want to do that for
KVM since KVM can't guarantee the holes are zero (userspace can stuff APIC state).

  reply	other threads:[~2025-03-27 14:19 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-26  9:05 [RFC v2 00/17] AMD: Add Secure AVIC Guest Support Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 01/17] x86/apic: Add new driver for Secure AVIC Neeraj Upadhyay
2025-03-20 15:51   ` Borislav Petkov
2025-03-21  3:44     ` Neeraj Upadhyay
2025-03-21 13:55       ` Borislav Petkov
2025-03-21 16:09         ` Neeraj Upadhyay
2025-03-21 17:11           ` Borislav Petkov
2025-04-01  5:12             ` Neeraj Upadhyay
2025-04-02  9:47               ` Borislav Petkov
2025-04-02 10:34                 ` Neeraj Upadhyay
2025-04-07 13:17                   ` Borislav Petkov
2025-04-07 16:17                     ` Neeraj Upadhyay
2025-03-21 12:44     ` Thomas Gleixner
2025-03-21 13:52       ` Borislav Petkov
2025-03-21 12:53   ` Thomas Gleixner
2025-03-21 13:25     ` Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 02/17] x86/apic: Initialize Secure AVIC APIC backing page Neeraj Upadhyay
2025-03-21 13:08   ` Thomas Gleixner
2025-03-21 13:49     ` Neeraj Upadhyay
2025-03-21 16:32   ` Francesco Lavra
2025-03-21 17:00     ` Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 03/17] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver Neeraj Upadhyay
2025-03-21 13:38   ` Thomas Gleixner
2025-03-21 14:00     ` Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 04/17] x86/apic: Initialize APIC ID for Secure AVIC Neeraj Upadhyay
2025-03-21 13:52   ` Thomas Gleixner
2025-03-21 15:11     ` Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 05/17] x86/apic: Add update_vector callback " Neeraj Upadhyay
2025-03-21 14:27   ` Thomas Gleixner
2025-03-21 15:35     ` Neeraj Upadhyay
2025-03-25 12:10       ` Neeraj Upadhyay
2025-03-27 10:27         ` Thomas Gleixner
2025-03-27 11:17           ` Neeraj Upadhyay
2025-03-27 12:18             ` Thomas Gleixner
2025-03-27 12:30               ` Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 06/17] x86/apic: Add support to send IPI " Neeraj Upadhyay
2025-03-21 15:06   ` Thomas Gleixner
2025-04-01 10:25     ` Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 07/17] x86/apic: Support LAPIC timer " Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 08/17] x86/sev: Initialize VGIF for secondary VCPUs " Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 09/17] x86/apic: Add support to send NMI IPI " Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 10/17] x86/apic: Allow NMI to be injected from hypervisor " Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 11/17] x86/sev: Enable NMI support " Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 12/17] x86/apic: Read and write LVT* APIC registers from HV for SAVIC guests Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 13/17] x86/apic: Handle EOI writes " Neeraj Upadhyay
2025-03-21 15:41   ` Thomas Gleixner
2025-03-21 17:11     ` Sean Christopherson
2025-03-27 10:48       ` Thomas Gleixner
2025-03-27 12:20         ` Thomas Gleixner
2025-03-27 14:19           ` Sean Christopherson [this message]
2025-03-27 16:54             ` Thomas Gleixner
2025-02-26  9:05 ` [RFC v2 14/17] x86/apic: Add kexec support for Secure AVIC Neeraj Upadhyay
2025-03-21 15:48   ` Thomas Gleixner
2025-04-01 10:35     ` Neeraj Upadhyay
2025-04-01 18:31       ` Thomas Gleixner
2025-04-02  2:40         ` Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 15/17] x86/apic: Enable Secure AVIC in Control MSR Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 16/17] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests Neeraj Upadhyay
2025-02-26  9:05 ` [RFC v2 17/17] x86/sev: Indicate SEV-SNP guest supports Secure AVIC Neeraj Upadhyay

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