From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Thomas Richard <thomas.richard@bootlin.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Bartosz Golaszewski <brgl@bgdev.pl>, Lee Jones <lee@kernel.org>,
Pavel Machek <pavel@ucw.cz>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-leds@vger.kernel.org, thomas.petazzoni@bootlin.com,
DanieleCleri@aaeon.eu, GaryWang@aaeon.com.tw
Subject: Re: [PATCH 4/5] pinctrl: Add pin controller driver for AAEON UP boards
Date: Fri, 4 Apr 2025 16:26:27 +0300 [thread overview]
Message-ID: <Z-_eA-gUPJt57DRK@smile.fi.intel.com> (raw)
In-Reply-To: <cb07335e-8dc0-4cf1-8524-40770d5419cc@bootlin.com>
On Fri, Apr 04, 2025 at 03:11:00PM +0200, Thomas Richard wrote:
> On 2/5/25 12:41, Andy Shevchenko wrote:
> > On Wed, Feb 05, 2025 at 12:17:29PM +0100, Thomas Richard wrote:
> >> On 1/16/25 15:14, Andy Shevchenko wrote:
...
> >> So I'm not really convinced by all this complexity for only one driver.
> >
> > I am not sure if I asked you to show the excerpt from DSDT for this device.
> > Is there any link I can browse the ASL code (for that particular device,
> > most likely I wouldn't need the full DSDT)?
> >
>
> I'm currently working on the V3, and I just remembered that you asked me
> DSDT file. So for the UP Squared board, please find the full DSDT, and
> also SSDT1 (which contains the FPGA declaration).
>
> DSDT: https://gist.github.com/thom24/4d24c2a2f58d93f799e512c2485efd45
> SSDT1: https://gist.github.com/thom24/2da44ef86eacfa5d2d492ce43fa41aa4
Thank you!
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2025-04-04 13:26 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-11 16:27 [PATCH 0/5] Add support for the AAEON UP board FPGA Thomas Richard
2024-12-11 16:27 ` [PATCH 1/5] mfd: Add support for " Thomas Richard
2024-12-11 16:27 ` [PATCH 2/5] leds: Add AAEON UP board LED driver Thomas Richard
2024-12-11 16:27 ` [PATCH 3/5] gpiolib: add gpiochip_add_pinlist_range() function Thomas Richard
2024-12-16 9:17 ` Bartosz Golaszewski
2024-12-16 10:02 ` Thomas Richard
2024-12-20 12:31 ` Linus Walleij
2024-12-11 16:27 ` [PATCH 4/5] pinctrl: Add pin controller driver for AAEON UP boards Thomas Richard
2024-12-20 12:22 ` Linus Walleij
2024-12-20 13:50 ` Thomas Richard
2024-12-21 23:43 ` Linus Walleij
2025-01-03 10:28 ` Thomas Richard
2025-01-13 9:46 ` Andy Shevchenko
2025-01-14 10:28 ` Thomas Richard
2025-01-16 9:12 ` Andy Shevchenko
2025-01-16 12:21 ` Thomas Richard
2025-01-16 12:31 ` Andy Shevchenko
2025-01-16 13:23 ` Thomas Richard
2025-01-16 14:14 ` Andy Shevchenko
2025-02-05 11:17 ` Thomas Richard
2025-02-05 11:41 ` Andy Shevchenko
2025-04-04 13:11 ` Thomas Richard
2025-04-04 13:26 ` Andy Shevchenko [this message]
2025-01-22 12:46 ` Linus Walleij
2024-12-11 16:27 ` [PATCH 5/5] MAINTAINERS: Add entry for AAEON UP board FPGA drivers Thomas Richard
2024-12-13 17:09 ` (subset) [PATCH 0/5] Add support for the AAEON UP board FPGA Lee Jones
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