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From: Niklas Cassel <cassel@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>
Cc: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Jon Mason" <jdmason@kudzu.us>,
	"Dave Jiang" <dave.jiang@intel.com>,
	"Allen Hubbe" <allenbh@gmail.com>,
	"Marek Vasut" <marek.vasut+renesas@gmail.com>,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
	"Yuya Hamamachi" <yuya.hamamachi.sx@renesas.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	ntb@lists.linux.dev, dlemoal@kernel.org
Subject: Re: [PATCH 1/2] PCI: endpoint: strictly apply bar fixed size to allocate space
Date: Mon, 31 Mar 2025 10:14:53 +0200	[thread overview]
Message-ID: <Z-pO_c2zXxDqvIsU@ryzen> (raw)
In-Reply-To: <20250328-pci-ep-size-alignment-v1-1-ee5b78b15a9a@baylibre.com>

Hello Jerome,

On Fri, Mar 28, 2025 at 03:53:42PM +0100, Jerome Brunet wrote:
> When trying to allocate space for an endpoint function on a BAR with a
> fixed size, that size should be used regardless of the alignment.

Why?


> 
> Some controller may have specified an alignment, but do have a BAR with a
> fixed size smaller that alignment. In such case, pci_epf_alloc_space()
> tries to allocate a space that matches the alignment and it won't work.

Could you please elaborate "won't work".


> 
> When the BAR size is fixed, pci_epf_alloc_space() should not deviate
> from this fixed size.

I think that this commit is wrong.

In your specific SoC:
 	.msix_capable = false,
 	.bar[BAR_1] = { .type = BAR_RESERVED, },
 	.bar[BAR_3] = { .type = BAR_RESERVED, },
	.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = 256 },
 	.bar[BAR_5] = { .type = BAR_RESERVED, },
 	.align = SZ_1M,

fixed_size is 256B, inbound iATU alignment is 1 MB, which means that the
smallest area that the iATU can map is 1 MB.

I do think that it makes sense to have backing memory for the whole area
that the iATU will have mapped.


The reason why the the ALIGN() is done, is so that the size sent in to
dma_alloc_coherent() will return addresses that are aligned to the inbound
iATU alignment requirement.


I guess the problem is that your driver has a fixed size BAR that is smaller
than the inbound iATU alignment requirement, something that has never been a
problem before, because no SoC has previously defined such a fixed size BAR.

I doubt the problem is allocating such a BAR, so where is it you actually
encounter a problem? My guess is in .set_bar().

Perhaps the solution is to add another struct member to struct pci_epf_bar,
size (meaning actual BAR size, which will be written to the BAR mask register)
and backing_mem_size.

Or.. we modify pci_epf_alloc_space() to allocate an aligned size, but the
size that we store in (struct pci_epf_bar).size is the unaligned size.


Kind regards,
Niklas

  reply	other threads:[~2025-03-31  8:14 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-28 14:53 [PATCH 0/2] PCI: endpoint: space allocation fixups Jerome Brunet
2025-03-28 14:53 ` [PATCH 1/2] PCI: endpoint: strictly apply bar fixed size to allocate space Jerome Brunet
2025-03-31  8:14   ` Niklas Cassel [this message]
2025-03-31 14:39     ` Jerome Brunet
2025-04-01  9:25       ` Niklas Cassel
2025-03-28 14:53 ` [PATCH 2/2] PCI: endpoint: pci-epf-vntb: simplify ctrl/spad space allocation Jerome Brunet
2025-03-31 14:48   ` Frank Li
2025-04-01  7:39     ` Jerome Brunet
2025-04-01 14:55       ` Frank Li
2025-04-02 13:44         ` Jerome Brunet

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