From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: linux-kernel@vger.kernel.org
Cc: Mark Brown <broonie@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rafael@kernel.org>
Subject: Re: [PATCH v2 1/1] regmap: Synchronize cache for the page selector
Date: Thu, 12 Dec 2024 16:28:46 +0200 [thread overview]
Message-ID: <Z1rzHvJDgPdlfEBK@smile.fi.intel.com> (raw)
In-Reply-To: <20241122140357.1337686-1-andriy.shevchenko@linux.intel.com>
On Fri, Nov 22, 2024 at 04:03:20PM +0200, Andy Shevchenko wrote:
> If the selector register is represented in each page, its value
> in accordance to the debugfs is stale because it gets synchronized
> only after the real page switch happens. Synchronize cache for
> the page selector.
>
> Before (offset followed by hexdump, the first byte is selector):
>
> // Real registers
> 18: 05 ff 00 00 ff 0f 00 00 f0 00 00 00
> ...
> // Virtual (per port)
> 40: 05 ff 00 00 e0 e0 00 00 00 00 00 1f
> 50: 00 ff 00 00 e0 e0 00 00 00 00 00 1f
> 60: 01 ff 00 00 ff ff 00 00 00 00 00 00
> 70: 02 ff 00 00 cf f3 00 00 00 00 00 0c
> 80: 03 ff 00 00 00 00 00 00 00 00 00 ff
> 90: 04 ff 00 00 ff 0f 00 00 f0 00 00 00
>
> After:
>
> // Real registers
> 18: 05 ff 00 00 ff 0f 00 00 f0 00 00 00
> ...
> // Virtual (per port)
> 40: 00 ff 00 00 e0 e0 00 00 00 00 00 1f
> 50: 01 ff 00 00 e0 e0 00 00 00 00 00 1f
> 60: 02 ff 00 00 ff ff 00 00 00 00 00 00
> 70: 03 ff 00 00 cf f3 00 00 00 00 00 0c
> 80: 04 ff 00 00 00 00 00 00 00 00 00 ff
> 90: 05 ff 00 00 ff 0f 00 00 f0 00 00 00
Anything should I do to move this fix forward?
> Fixes: 6863ca622759 ("regmap: Add support for register indirect addressing.")
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2024-12-12 14:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-22 14:03 [PATCH v2 1/1] regmap: Synchronize cache for the page selector Andy Shevchenko
2024-12-12 14:28 ` Andy Shevchenko [this message]
2024-12-12 14:36 ` Mark Brown
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