[PATCH 0/8] drm/msm/dpu: catalog corrections

[PATCH 0/8] drm/msm/dpu: catalog corrections

[Dmitry Baryshkov]

After checking the DSPP units in the catalog vs the vendor devicetrees,
link several DSPP units to the corresponding LM units. Each correction
is submitted separately in order to be able to track and apply / skip
them separately based on the feedback from Qualcomm.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Dmitry Baryshkov (8):
      drm/msm/dpu: link DSPP_2/_3 blocks on SM8150
      drm/msm/dpu: link DSPP_2/_3 blocks on SC8180X
      drm/msm/dpu: link DSPP_2/_3 blocks on SM8250
      drm/msm/dpu: link DSPP_2/_3 blocks on SM8350
      drm/msm/dpu: link DSPP_2/_3 blocks on SM8550
      drm/msm/dpu: link DSPP_2/_3 blocks on SM8650
      drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100
      drm/msm/dpu: provide DSPP and correct LM config for SDM670

 .../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h    |  2 +
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h | 54 +++++++++++++++++++++-
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h |  2 +
 .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h    |  2 +
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h |  2 +
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h |  2 +
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h |  2 +
 .../drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h   |  2 +
 8 files changed, 66 insertions(+), 2 deletions(-)
---
base-commit: 4172e9bbb583a2af5f1a3db437caf72a90714ad9
change-id: 20241216-dpu-fix-catalog-63a3bc0db31e

Best regards,
-- 
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

[PATCH 1/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8150

[Dmitry Baryshkov]

Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[12]50")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
index 6ccfde82fecdb4e3612df161814b16f7af40ca5f..421afacb7248039abd9fb66bcb73b756ae0d640a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
@@ -164,6 +164,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_3,
 		.pingpong = PINGPONG_2,
+		.dspp = DSPP_2,
 	}, {
 		.name = "lm_3", .id = LM_3,
 		.base = 0x47000, .len = 0x320,
@@ -171,6 +172,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_2,
 		.pingpong = PINGPONG_3,
+		.dspp = DSPP_3,
 	}, {
 		.name = "lm_4", .id = LM_4,
 		.base = 0x48000, .len = 0x320,

-- 
2.39.5

[PATCH 2/8] drm/msm/dpu: link DSPP_2/_3 blocks on SC8180X

[Dmitry Baryshkov]

Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Fixes: f5abecfe339e ("drm/msm/dpu: enable DSPP and DSC on sc8180x")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index bab19ddd1d4f97805c1bfba8ba6e117ae77c6c2e..641023b102bf59352546f0782d9264986367de78 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -163,6 +163,7 @@ static const struct dpu_lm_cfg sc8180x_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_3,
 		.pingpong = PINGPONG_2,
+		.dspp = DSPP_2,
 	}, {
 		.name = "lm_3", .id = LM_3,
 		.base = 0x47000, .len = 0x320,
@@ -170,6 +171,7 @@ static const struct dpu_lm_cfg sc8180x_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_2,
 		.pingpong = PINGPONG_3,
+		.dspp = DSPP_3,
 	}, {
 		.name = "lm_4", .id = LM_4,
 		.base = 0x48000, .len = 0x320,

-- 
2.39.5

[PATCH 3/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8250

[Dmitry Baryshkov]

Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[12]50")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index a57d50b1f0280776bb95f55b8fce9aa8259d7041..e8916ae826a6daf30eb08de53521dae89c07636c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -162,6 +162,7 @@ static const struct dpu_lm_cfg sm8250_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_3,
 		.pingpong = PINGPONG_2,
+		.dspp = DSPP_2,
 	}, {
 		.name = "lm_3", .id = LM_3,
 		.base = 0x47000, .len = 0x320,
@@ -169,6 +170,7 @@ static const struct dpu_lm_cfg sm8250_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_2,
 		.pingpong = PINGPONG_3,
+		.dspp = DSPP_3,
 	}, {
 		.name = "lm_4", .id = LM_4,
 		.base = 0x48000, .len = 0x320,

-- 
2.39.5

[PATCH 4/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8350

[Dmitry Baryshkov]

Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Fixes: 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index aced16e350daa1bf5d24078b2468b5095a40ce07..f7c08e89c882038aa658955ca1202bda3d928e80 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -162,6 +162,7 @@ static const struct dpu_lm_cfg sm8350_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_3,
 		.pingpong = PINGPONG_2,
+		.dspp = DSPP_2,
 	}, {
 		.name = "lm_3", .id = LM_3,
 		.base = 0x47000, .len = 0x320,
@@ -169,6 +170,7 @@ static const struct dpu_lm_cfg sm8350_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_2,
 		.pingpong = PINGPONG_3,
+		.dspp = DSPP_3,
 	}, {
 		.name = "lm_4", .id = LM_4,
 		.base = 0x48000, .len = 0x320,

-- 
2.39.5

[PATCH 5/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8550

[Dmitry Baryshkov]

Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index ad48defa154f7d808c695860fd91e60bbb08f42a..a1dbbf5c652ff9f21c02af2e2520f019702f29c1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -160,6 +160,7 @@ static const struct dpu_lm_cfg sm8550_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_3,
 		.pingpong = PINGPONG_2,
+		.dspp = DSPP_2,
 	}, {
 		.name = "lm_3", .id = LM_3,
 		.base = 0x47000, .len = 0x320,
@@ -167,6 +168,7 @@ static const struct dpu_lm_cfg sm8550_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_2,
 		.pingpong = PINGPONG_3,
+		.dspp = DSPP_3,
 	}, {
 		.name = "lm_4", .id = LM_4,
 		.base = 0x48000, .len = 0x320,

-- 
2.39.5

[PATCH 6/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8650

[Dmitry Baryshkov]

Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Fixes: b94747f7d8c7 ("drm/msm/dpu: add support for SM8650 DPU")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
index eb5dfff2ec4f48d793f9d83aafed592d0947f04b..e187e7b1cef1677261a5de7b01ea3fa8136723ac 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
@@ -160,6 +160,7 @@ static const struct dpu_lm_cfg sm8650_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_3,
 		.pingpong = PINGPONG_2,
+		.dspp = DSPP_2,
 	}, {
 		.name = "lm_3", .id = LM_3,
 		.base = 0x47000, .len = 0x400,
@@ -167,6 +168,7 @@ static const struct dpu_lm_cfg sm8650_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_2,
 		.pingpong = PINGPONG_3,
+		.dspp = DSPP_3,
 	}, {
 		.name = "lm_4", .id = LM_4,
 		.base = 0x48000, .len = 0x400,

-- 
2.39.5

[PATCH 7/8] drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100

[Dmitry Baryshkov]

Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Fixes: e3b1f369db5a ("drm/msm/dpu: Add X1E80100 support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
index d61895bb396fb4287e9b41807a3bb0cdb25d4e25..4f110be6b750d30e158d517aaa507c7b4eda0af4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
@@ -159,6 +159,7 @@ static const struct dpu_lm_cfg x1e80100_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_3,
 		.pingpong = PINGPONG_2,
+		.dspp = DSPP_2,
 	}, {
 		.name = "lm_3", .id = LM_3,
 		.base = 0x47000, .len = 0x320,
@@ -166,6 +167,7 @@ static const struct dpu_lm_cfg x1e80100_lm[] = {
 		.sblk = &sdm845_lm_sblk,
 		.lm_pair = LM_2,
 		.pingpong = PINGPONG_3,
+		.dspp = DSPP_3,
 	}, {
 		.name = "lm_4", .id = LM_4,
 		.base = 0x48000, .len = 0x320,

-- 
2.39.5

[PATCH 8/8] drm/msm/dpu: provide DSPP and correct LM config for SDM670

[Dmitry Baryshkov]

On SDM670 the DPU has two DSPP blocks compared to 4 DSPP blocks on
SDM845. Currently SDM670 just reuses LMs and DSPPs from SDM845. Define
platform-specific configuration for those blocks.

Fixes: e140b7e496b7 ("drm/msm/dpu: Add hw revision 4.1 (SDM670)")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h | 54 +++++++++++++++++++++-
 1 file changed, 52 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h
index cbbdaebe357ec4a82a3c3d950aa13792a1fb2d6e..daef07924886a529ee30349ae80375a324bbc245 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h
@@ -65,6 +65,54 @@ static const struct dpu_sspp_cfg sdm670_sspp[] = {
 	},
 };
 
+static const struct dpu_lm_cfg sdm670_lm[] = {
+	{
+		.name = "lm_0", .id = LM_0,
+		.base = 0x44000, .len = 0x320,
+		.features = MIXER_SDM845_MASK,
+		.sblk = &sdm845_lm_sblk,
+		.lm_pair = LM_1,
+		.pingpong = PINGPONG_0,
+		.dspp = DSPP_0,
+	}, {
+		.name = "lm_1", .id = LM_1,
+		.base = 0x45000, .len = 0x320,
+		.features = MIXER_SDM845_MASK,
+		.sblk = &sdm845_lm_sblk,
+		.lm_pair = LM_0,
+		.pingpong = PINGPONG_1,
+		.dspp = DSPP_1,
+	}, {
+		.name = "lm_2", .id = LM_2,
+		.base = 0x46000, .len = 0x320,
+		.features = MIXER_SDM845_MASK,
+		.sblk = &sdm845_lm_sblk,
+		.lm_pair = LM_5,
+		.pingpong = PINGPONG_2,
+	}, {
+		.name = "lm_5", .id = LM_5,
+		.base = 0x49000, .len = 0x320,
+		.features = MIXER_SDM845_MASK,
+		.sblk = &sdm845_lm_sblk,
+		.lm_pair = LM_2,
+		.pingpong = PINGPONG_3,
+	},
+};
+
+static const struct dpu_dspp_cfg sdm670_dspp[] = {
+	{
+		.name = "dspp_0", .id = DSPP_0,
+		.base = 0x54000, .len = 0x1800,
+		.features = DSPP_SC7180_MASK,
+		.sblk = &sdm845_dspp_sblk,
+	}, {
+		.name = "dspp_1", .id = DSPP_1,
+		.base = 0x56000, .len = 0x1800,
+		.features = DSPP_SC7180_MASK,
+		.sblk = &sdm845_dspp_sblk,
+	},
+};
+
 static const struct dpu_dsc_cfg sdm670_dsc[] = {
 	{
 		.name = "dsc_0", .id = DSC_0,
@@ -88,8 +136,10 @@ const struct dpu_mdss_cfg dpu_sdm670_cfg = {
 	.ctl = sdm845_ctl,
 	.sspp_count = ARRAY_SIZE(sdm670_sspp),
 	.sspp = sdm670_sspp,
-	.mixer_count = ARRAY_SIZE(sdm845_lm),
-	.mixer = sdm845_lm,
+	.mixer_count = ARRAY_SIZE(sdm670_lm),
+	.mixer = sdm670_lm,
+	.dspp_count = ARRAY_SIZE(sdm670_dspp),
+	.dspp = sdm670_dspp,
 	.pingpong_count = ARRAY_SIZE(sdm845_pp),
 	.pingpong = sdm845_pp,
 	.dsc_count = ARRAY_SIZE(sdm670_dsc),

-- 
2.39.5

Re: [PATCH 1/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8150

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[12]50")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 2 ++
>   1 file changed, 2 insertions(+)
> 

Change looks fine

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

One question below (not tied to the change but arose due to it):

> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> index 6ccfde82fecdb4e3612df161814b16f7af40ca5f..421afacb7248039abd9fb66bcb73b756ae0d640a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> @@ -164,6 +164,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
>   		.sblk = &sdm845_lm_sblk,
>   		.lm_pair = LM_3,
>   		.pingpong = PINGPONG_2,
> +		.dspp = DSPP_2,
>   	}, {
>   		.name = "lm_3", .id = LM_3,
>   		.base = 0x47000, .len = 0x320,
> @@ -171,6 +172,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
>   		.sblk = &sdm845_lm_sblk,
>   		.lm_pair = LM_2,
>   		.pingpong = PINGPONG_3,
> +		.dspp = DSPP_3,
>   	}, {
>   		.name = "lm_4", .id = LM_4,
>   		.base = 0x48000, .len = 0x320,
> 

the consumer of .dspp seems to be in the RM code which is used to map 
the DSPP to encoder_id but is there really any case where lm_id != 
dspp_id ... I guess I am missing the context of why DSPP id needs to be 
tracked as LMs and DSPPs go together. Let me also check this part 
internally.

Re: [PATCH 2/8] drm/msm/dpu: link DSPP_2/_3 blocks on SC8180X

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Fixes: f5abecfe339e ("drm/msm/dpu: enable DSPP and DSC on sc8180x")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 2 ++
>   1 file changed, 2 insertions(+)
> 

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

Re: [PATCH 3/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8250

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[12]50")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 2 ++
>   1 file changed, 2 insertions(+)
> 

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

Re: [PATCH 4/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8350

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Fixes: 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 2 ++
>   1 file changed, 2 insertions(+)
> 

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

Re: [PATCH 5/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8550

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 2 ++
>   1 file changed, 2 insertions(+)
> 


Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

Re: [PATCH 6/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8650

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Fixes: b94747f7d8c7 ("drm/msm/dpu: add support for SM8650 DPU")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 2 ++
>   1 file changed, 2 insertions(+)
> 

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

Re: [PATCH 1/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8150

[Dmitry Baryshkov]

On Mon, Dec 16, 2024 at 01:11:35PM -0800, Abhinav Kumar wrote:
> 
> 
> On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> > Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> > 
> > Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[12]50")
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> >   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 2 ++
> >   1 file changed, 2 insertions(+)
> > 
> 
> Change looks fine
> 
> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> 
> One question below (not tied to the change but arose due to it):
> 
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> > index 6ccfde82fecdb4e3612df161814b16f7af40ca5f..421afacb7248039abd9fb66bcb73b756ae0d640a 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> > @@ -164,6 +164,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
> >   		.sblk = &sdm845_lm_sblk,
> >   		.lm_pair = LM_3,
> >   		.pingpong = PINGPONG_2,
> > +		.dspp = DSPP_2,
> >   	}, {
> >   		.name = "lm_3", .id = LM_3,
> >   		.base = 0x47000, .len = 0x320,
> > @@ -171,6 +172,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
> >   		.sblk = &sdm845_lm_sblk,
> >   		.lm_pair = LM_2,
> >   		.pingpong = PINGPONG_3,
> > +		.dspp = DSPP_3,
> >   	}, {
> >   		.name = "lm_4", .id = LM_4,
> >   		.base = 0x48000, .len = 0x320,
> > 
> 
> the consumer of .dspp seems to be in the RM code which is used to map the
> DSPP to encoder_id but is there really any case where lm_id != dspp_id ... I
> guess I am missing the context of why DSPP id needs to be tracked as LMs and
> DSPPs go together. Let me also check this part internally.

For example check the SDM845, the LM_5 is tied to DSPP_3.

LM | DSPP
---------
0  |  0
1  |  1
2  |  2
5  |  3

-- 
With best wishes
Dmitry

Re: [PATCH 7/8] drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Fixes: e3b1f369db5a ("drm/msm/dpu: Add X1E80100 support")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 2 ++
>   1 file changed, 2 insertions(+)
> 

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

Re: [PATCH 1/8] drm/msm/dpu: link DSPP_2/_3 blocks on SM8150

[Abhinav Kumar]

On 12/16/2024 2:21 PM, Dmitry Baryshkov wrote:
> On Mon, Dec 16, 2024 at 01:11:35PM -0800, Abhinav Kumar wrote:
>>
>>
>> On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
>>> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
>>>
>>> Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[12]50")
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>> ---
>>>    drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 2 ++
>>>    1 file changed, 2 insertions(+)
>>>
>>
>> Change looks fine
>>
>> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
>>
>> One question below (not tied to the change but arose due to it):
>>
>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
>>> index 6ccfde82fecdb4e3612df161814b16f7af40ca5f..421afacb7248039abd9fb66bcb73b756ae0d640a 100644
>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
>>> @@ -164,6 +164,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
>>>    		.sblk = &sdm845_lm_sblk,
>>>    		.lm_pair = LM_3,
>>>    		.pingpong = PINGPONG_2,
>>> +		.dspp = DSPP_2,
>>>    	}, {
>>>    		.name = "lm_3", .id = LM_3,
>>>    		.base = 0x47000, .len = 0x320,
>>> @@ -171,6 +172,7 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
>>>    		.sblk = &sdm845_lm_sblk,
>>>    		.lm_pair = LM_2,
>>>    		.pingpong = PINGPONG_3,
>>> +		.dspp = DSPP_3,
>>>    	}, {
>>>    		.name = "lm_4", .id = LM_4,
>>>    		.base = 0x48000, .len = 0x320,
>>>
>>
>> the consumer of .dspp seems to be in the RM code which is used to map the
>> DSPP to encoder_id but is there really any case where lm_id != dspp_id ... I
>> guess I am missing the context of why DSPP id needs to be tracked as LMs and
>> DSPPs go together. Let me also check this part internally.
> 
> For example check the SDM845, the LM_5 is tied to DSPP_3.
> 
> LM | DSPP
> ---------
> 0  |  0
> 1  |  1
> 2  |  2
> 5  |  3
> 

Ah ... yes ... seems like sdm845 is the only one having this anomaly.

Thanks for clarifying.

Re: [PATCH 8/8] drm/msm/dpu: provide DSPP and correct LM config for SDM670

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> On SDM670 the DPU has two DSPP blocks compared to 4 DSPP blocks on
> SDM845. Currently SDM670 just reuses LMs and DSPPs from SDM845. Define
> platform-specific configuration for those blocks.
> 
> Fixes: e140b7e496b7 ("drm/msm/dpu: Add hw revision 4.1 (SDM670)")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h | 54 +++++++++++++++++++++-
>   1 file changed, 52 insertions(+), 2 deletions(-)
> 

Matches the docs I have,

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>

Re: [PATCH 0/8] drm/msm/dpu: catalog corrections

[Abhinav Kumar]

On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
> After checking the DSPP units in the catalog vs the vendor devicetrees,
> link several DSPP units to the corresponding LM units. Each correction
> is submitted separately in order to be able to track and apply / skip
> them separately based on the feedback from Qualcomm.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

All the patches LGTM in this series,

Thanks for the cleanup

Abhinav

> ---
> Dmitry Baryshkov (8):
>        drm/msm/dpu: link DSPP_2/_3 blocks on SM8150
>        drm/msm/dpu: link DSPP_2/_3 blocks on SC8180X
>        drm/msm/dpu: link DSPP_2/_3 blocks on SM8250
>        drm/msm/dpu: link DSPP_2/_3 blocks on SM8350
>        drm/msm/dpu: link DSPP_2/_3 blocks on SM8550
>        drm/msm/dpu: link DSPP_2/_3 blocks on SM8650
>        drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100
>        drm/msm/dpu: provide DSPP and correct LM config for SDM670
> 
>   .../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h    |  2 +
>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h | 54 +++++++++++++++++++++-
>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h |  2 +
>   .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h    |  2 +
>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h |  2 +
>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h |  2 +
>   .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h |  2 +
>   .../drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h   |  2 +
>   8 files changed, 66 insertions(+), 2 deletions(-)
> ---
> base-commit: 4172e9bbb583a2af5f1a3db437caf72a90714ad9
> change-id: 20241216-dpu-fix-catalog-63a3bc0db31e
> 
> Best regards,

Re: [PATCH 7/8] drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100

[Johan Hovold]

On Mon, Dec 16, 2024 at 10:27:28AM +0200, Dmitry Baryshkov wrote:
> Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.

Please say something about why you're doing this and what the expected
outcome of doing so is.

There is currently no way for a third party (e.g. stable or distro
maintainer) to determine what this patch does, if it needs to be
backported or if it's essentially just a clean up like Abhinav indicated
in one of his replies.

> Fixes: e3b1f369db5a ("drm/msm/dpu: Add X1E80100 support")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Johan

Re: [PATCH 7/8] drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100

[Dmitry Baryshkov]

On Tue, Dec 17, 2024 at 09:41:44AM +0100, Johan Hovold wrote:
> On Mon, Dec 16, 2024 at 10:27:28AM +0200, Dmitry Baryshkov wrote:
> > Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> 
> Please say something about why you're doing this and what the expected
> outcome of doing so is.
> 
> There is currently no way for a third party (e.g. stable or distro
> maintainer) to determine what this patch does, if it needs to be
> backported or if it's essentially just a clean up like Abhinav indicated
> in one of his replies.

These patches allow using colour transformation matrix (aka night mode)
with more outputs at the same time. I think at this point only CrOS
compositor actually uses CTM, so these changes do not need to be
backported. However they are not cleanups, it was a feedback for the
SM6150 patch for the reasons expressed in the Abhinav's email.

> 
> > Fixes: e3b1f369db5a ("drm/msm/dpu: Add X1E80100 support")
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> Johan

-- 
With best wishes
Dmitry

Re: [PATCH 7/8] drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100

[Johan Hovold]

On Tue, Dec 17, 2024 at 12:38:17PM +0200, Dmitry Baryshkov wrote:
> On Tue, Dec 17, 2024 at 09:41:44AM +0100, Johan Hovold wrote:
> > On Mon, Dec 16, 2024 at 10:27:28AM +0200, Dmitry Baryshkov wrote:
> > > Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
> > 
> > Please say something about why you're doing this and what the expected
> > outcome of doing so is.
> > 
> > There is currently no way for a third party (e.g. stable or distro
> > maintainer) to determine what this patch does, if it needs to be
> > backported or if it's essentially just a clean up like Abhinav indicated
> > in one of his replies.
> 
> These patches allow using colour transformation matrix (aka night mode)
> with more outputs at the same time. I think at this point only CrOS
> compositor actually uses CTM, so these changes do not need to be
> backported.

Ok, thanks for clarifying. Can you put something like this in the commit
messages so that we have a record of it?

> However they are not cleanups, it was a feedback for the
> SM6150 patch for the reasons expressed in the Abhinav's email.

I don't see any SM6150 patch in the thread. Do you have a pointer?

Johan