Re: [PATCH 4/7] rtc: pm8xxx: mitigate flash wear

Johan Hovold
2025-01-23T11:39:12Z

On Mon, Jan 20, 2025 at 03:41:49PM +0100, Johan Hovold wrote:
> On many Qualcomm platforms the PMIC RTC control and time registers are
> read-only so that the RTC time can not be updated. Instead an offset
> needs be stored in some machine-specific non-volatile memory, which the
> driver can take into account.
>
> On machines like the Lenovo ThinkPad X14s the PMIC RTC drifts about one

s/X14s/X13s/

> second every 3.5 hours, something which leads to repeated updates of the
> offset when NTP synchronisation is enabled.
>
> Reduce wear of the underlying flash storage (used for UEFI variables) by
> deferring writes until shutdown in case they appear to be due to clock
> drift.
>
> As an example, allowing the on-flash offset to differ up to 30 s reduces

And this was supposed to say:

As an example, deferring writes when the new offset differs up
to 30 s from the previous one reduces

> the number of writes on the X13s during a ten day session with the
> machine not suspending for more than four days in a row from up to 68
> writes (every 3.5 h) to at most two (boot and shutdown).

Johan