From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.8bytes.org (mail.8bytes.org [85.214.250.239]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 50A501953AD for ; Tue, 28 Jan 2025 08:13:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=85.214.250.239 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738052037; cv=none; b=TkW6DtwoB57uGFV2AhAgmhS0aIG+zkm8s/WYZvpKJp+t1VueX8p+W3I2aIO2/F5qGq69NtcdhqnmTs9hoNY/mZ8MQotcMONiOjD30AvmfNrJH5W41rx09sO16208fODLsU3HU9bBW9bpKcM/Xp5bW8XMnz4Hb4modJN6zcfyBUc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738052037; c=relaxed/simple; bh=Xx4+0vEfEXTqSFJunAc2IVtmiy9RhQjSxHpTCx+DnzU=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=L2YwIIrrapptrl/Z2zqSV2YfNciw8nRODfLfNxS3mrxavDi6HPtX5KyCuAxcNDEdKneG1lLQTgxjD4OO4gzib1oYRB26LD6wDzwIvtqYUmMU//2PJcj1qz6KCe4j4nVcFaHTpxiYl/ywmRx9zH9Nku/m6CA2GyjMHx45j1PDOg0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=8bytes.org; spf=pass smtp.mailfrom=8bytes.org; dkim=pass (2048-bit key) header.d=8bytes.org header.i=@8bytes.org header.b=UcNYVQRK; arc=none smtp.client-ip=85.214.250.239 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=8bytes.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=8bytes.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=8bytes.org header.i=@8bytes.org header.b="UcNYVQRK" Received: from 8bytes.org (p4ffe03ae.dip0.t-ipconnect.de [79.254.3.174]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.8bytes.org (Postfix) with ESMTPSA id 859CF4041B; Tue, 28 Jan 2025 09:13:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=8bytes.org; s=default; t=1738052028; bh=Xx4+0vEfEXTqSFJunAc2IVtmiy9RhQjSxHpTCx+DnzU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=UcNYVQRKnp+eO5OUkFQLXXKPO755R4MKx+//1idYX2XM4TcDCfh97GJZVgia45GE5 rzGH4L/dWWeNbWDQ3mj6a4mwTwzotWW1blMLGLW//NKu9GDk196QWv+YaVZbbo0o5y 9Ih89xT4JgnPKRb0MFbRvMHGNDoP8PEEFnlb5tAmuqnuuE5vPJ4ge/tZvUgMX9h9YT Z0hAO7zyEkttvcLpRVlUY4z8ZNuevmSkwvRIHTUHSYEoAovek1YJutJJ9mdepgM7mR ZkxC63oSE5FaSFiI70e1kUd/YirMVikJqQ4Ajmzw86AMS2l+wAq/GFz253b+PQCUDH FaB6r6VHcdPnA== Date: Tue, 28 Jan 2025 09:13:47 +0100 From: Joerg Roedel To: Dave Hansen Cc: Peter Zijlstra , Dave Hansen , linux-kernel@vger.kernel.org, x86@kernel.org, tglx@linutronix.de, bp@alien8.de, luto@kernel.org, kirill.shutemov@linux.intel.com, rick.p.edgecombe@intel.com, jgross@suse.com Subject: Re: [RFC][PATCH 0/8] x86/mm: Simplify PAE page table handling Message-ID: References: <20250123172428.D6D8C8D9@davehans-spike.ostc.intel.com> <20250123214911.GB969@noisy.programming.kicks-ass.net> <6c1785c8-e74e-4912-95bb-88b6e94f544f@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Fri, Jan 24, 2025 at 11:12:45AM -0800, Dave Hansen wrote: > Probably INTEL_QUARK_X1000, but it was mostly a toy. It's family 5, so > this applies: > > static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = { > ... > VULNWL(INTEL, 5, X86_MODEL_ANY, NO_SPECULATION), > > Here's one that was released in 2015, probably just for embedded use: > > > https://www.intel.com/content/www/us/en/products/sku/91947/intel-quark-microcontroller-d2000/specifications.html > > There were some Atoms in 2008 that seem to have had the 64-bit support > fused off. They were probably the last normal CPU that someone would > have in a PC that didn't have 64-bit support. > > > https://www.intel.com/content/www/us/en/ark/products/codename/24976/products-formerly-silverthorne.html > > https://www.intel.com/content/www/us/en/products/sku/36331/intel-atom-processor-n270-512k-cache-1-60-ghz-533-mhz-fsb/specifications.html > > But these are also NO_SPECULATION, so don't need most of the mitigations. So the last 32bit-only CPUs were released roughly 10 years ago. Most of these systems are likely out-of-service already, and those still in service are unlikely to require a new kernel. Imho it is time to deprecate 32-bit x86 support and set a hard removal date of, say, end of 2026 or so. It can also be timed to happen after a long-term stable kernel is released to give the few people who still want support some more time. This would send a serious message to hardware vendors to not come up with any more of these pieces. Btw, I've just built an x86-32 defconfig kernel from the latest tree, the text section alone is more than 14MiB big, the vmlinux image more than 29MiB. This is not really suitable for embedded environments. Regards, Joerg