From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Tristram.Ha@microchip.com,
Woojung Huh <woojung.huh@microchip.com>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
UNGLinuxDriver@microchip.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC net-next 1/2] net: pcs: xpcs: Add special code to operate in Microchip KSZ9477 switch
Date: Tue, 28 Jan 2025 12:40:43 +0000 [thread overview]
Message-ID: <Z5jQS-atzbR1O-9q@shell.armlinux.org.uk> (raw)
In-Reply-To: <20250128102128.z3pwym6kdgz4yjw4@skbuf>
On Tue, Jan 28, 2025 at 12:21:28PM +0200, Vladimir Oltean wrote:
> On Tue, Jan 28, 2025 at 09:24:45AM +0000, Russell King (Oracle) wrote:
> > On Mon, Jan 27, 2025 at 07:32:25PM -0800, Tristram.Ha@microchip.com wrote:
> > > For 1000BaseX mode setting neg_mode to false works, but that does not
> > > work for SGMII mode. Setting 0x18 value in register 0x1f8001 allows
> > > 1000BaseX mode to work with auto-negotiation enabled.
> >
> > I'm not sure (a) exactly what the above paragraph is trying to tell me,
> > and (b) why setting the AN control register to 0x18, which should only
> > affect SGMII, has an effect on 1000BASE-X.
> >
> > Note that a config word formatted for SGMII can result in a link with
> > 1000BASE-X to come up, but it is not correct. So, I highly recommend you
> > check the config word sent by the XPCS to the other end of the link.
> > Bit 0 of that will tell you whether it is SGMII-formatted or 802.3z
> > formatted.
>
> I, too, am concerned about the sentence "setting neg_mode to false works".
> If this is talking about the only neg_mode field that is a boolean, aka
> struct phylink_pcs :: neg_mode, then setting it to false is not
> something driver customizable, it should be true for API compliance,
> and all that remains false in current kernel trees will eventually get
> converted to true, AFAIU. If 1000BaseX works by setting xpcs->pcs.neg_mode
> to false and not modifying anything else, it should be purely a
> coincidence that it "works", since that makes the driver comparisons
> with PHYLINK_PCS_NEG_* constants meaningless.
Another related issue that concerns me is:
* Note: Since it is MAC side SGMII, there is no need to set
* SR_MII_AN_ADV. MAC side SGMII receives AN Tx Config from
* PHY about the link state change after C28 AN is completed
* between PHY and Link Partner. There is also no need to
* trigger AN restart for MAC-side SGMII.
However, 2a22b7ae2fa3 ("net: pcs: xpcs: adapt Wangxun NICs for SGMII
mode") added support for switching this to PHY-side SGMII, so this
comment is no longer true.
Again, I still wonder whether PHY-side is some kind of hack despite
my queries during the review of that change. Sadly, I didn't catch
that comment (and until recently, I didn't have any documentation
on these registers. I now have the KS9477 and SJA1105 manuals that
document some of the register set.)
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2025-01-28 12:40 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-28 3:32 [PATCH RFC net-next 0/2] Add SGMII port support to KSZ9477 switch Tristram.Ha
2025-01-28 3:32 ` [PATCH RFC net-next 1/2] net: pcs: xpcs: Add special code to operate in Microchip " Tristram.Ha
2025-01-28 9:24 ` Russell King (Oracle)
2025-01-28 10:21 ` Vladimir Oltean
2025-01-28 12:33 ` Russell King (Oracle)
2025-01-28 15:23 ` Vladimir Oltean
2025-01-28 16:32 ` Russell King (Oracle)
2025-01-28 18:26 ` Vladimir Oltean
2025-01-29 0:31 ` Tristram.Ha
2025-01-29 21:12 ` Vladimir Oltean
2025-01-29 22:05 ` Russell King (Oracle)
2025-01-29 23:05 ` Vladimir Oltean
2025-01-30 12:44 ` Russell King (Oracle)
2025-01-30 17:42 ` Russell King (Oracle)
2025-01-30 4:50 ` [WARNING: ATTACHMENT UNSCANNED]Re: " Tristram.Ha
2025-01-30 10:02 ` Vladimir Oltean
2025-01-30 11:02 ` Russell King (Oracle)
2025-01-30 11:20 ` Jose Abreu
2025-01-31 14:36 ` Jose Abreu
2025-01-31 15:49 ` Russell King (Oracle)
2025-02-01 1:12 ` [WARNING: ATTACHMENT UNSCANNED]Re: " Tristram.Ha
2025-02-01 9:20 ` Russell King (Oracle)
2025-01-31 2:35 ` Tristram.Ha
2025-01-30 10:15 ` Russell King (Oracle)
2025-01-31 2:35 ` Tristram.Ha
2025-01-31 13:35 ` Andrew Lunn
2025-02-01 1:11 ` Tristram.Ha
2025-01-30 4:50 ` Tristram.Ha
2025-01-30 9:59 ` Russell King (Oracle)
2025-01-31 2:24 ` Tristram.Ha
2025-01-31 9:43 ` Russell King (Oracle)
2025-01-30 13:24 ` Andrew Lunn
2025-01-31 2:21 ` Tristram.Ha
2025-01-28 12:40 ` Russell King (Oracle) [this message]
2025-01-28 13:16 ` Andrew Lunn
2025-01-28 13:39 ` Russell King (Oracle)
2025-01-28 15:43 ` Vladimir Oltean
2025-01-29 0:31 ` Tristram.Ha
2025-01-28 3:32 ` [PATCH RFC net-next 2/2] net: dsa: microchip: Add SGMII port support to " Tristram.Ha
2025-01-28 9:38 ` Russell King (Oracle)
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