Re: [PATCH 6/9] dt-bindings: pci: Add fsl,mpc83xx-pcie bindings

Rob Herring
2025-01-27T04:50:06Z

On Sun, Jan 26, 2025 at 07:59:01PM +0100, J. Neuschäfer wrote:
> Supplement Documentation/devicetree/bindings/pci/fsl,pci.txt with a more
> formal binding in YAML format.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
> .../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 83 ++++++++++++++++++++++
> 1 file changed, 83 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..12e86a9c20dfe2362d11f085bd9ae47238c4a37f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
> +
> +description: |
> + Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
> + See also: Documentation/devicetree/bindings/pci/fsl,pci.txt

Can you move that information here.

> +
> +maintainers:
> + - J. Neuschäfer <j.neuschaefer@gmx.net>
> +
> +allOf:
> + - $ref: /schemas/pci/pci-host-bridge.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8308-pcie
> + - fsl,mpc8315-pcie
> + - fsl,mpc8377-pcie
> + - fsl,mpc8378-pcie
> + - const: fsl,mpc8314-pcie
> + - const: fsl,mpc8314-pcie
> + - items:
> + - const: fsl,mpc8360-pci
> + - const: fsl,mpc8349-pci
> + - const: fsl,mpc8349-pci
> + - items:
> + - const: fsl,mpc8540-pcix
> + - const: fsl,mpc8540-pci
> + - const: fsl,mpc8540-pci
> + - items:
> + - const: fsl,mpc8540-pcix
> + - const: fsl,mpc8540-pci
> + - const: fsl,mpc8548-pcie
> + - const: fsl,mpc8548-pcie
> + - const: fsl,mpc8641-pcie

Move all the single 'const' to 1 enum entry.

> +
> + reg:
> + minItems: 1
> + items:
> + - description: internal registers
> + - description: config space access registers
> +
> + clock-frequency:
> + $ref: /schemas/types.yaml#/definitions/uint32

Don't need a type for this.

> +
> +required:
> + - reg
> + - compatible
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + pci1: pcie@e0009000 {
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + device_type = "pci";
> + compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
> + reg = <0xe0009000 0x00001000>;
> + ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
> + 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
> + bus-range = <0 255>;
> + interrupt-map-mask = <0xf800 0 0 7>;
> + interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
> + 0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
> + 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
> + 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
> + clock-frequency = <0>;
> + };
> +
> +...
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>