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Tue, 04 Feb 2025 03:54:53 -0800 (PST) Received: from mail.minyard.net ([2001:470:b8f6:1b:ec53:8290:86a1:aa7c]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2b3566690f6sm3918860fac.49.2025.02.04.03.54.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 03:54:51 -0800 (PST) Date: Tue, 4 Feb 2025 05:54:49 -0600 From: Corey Minyard To: Alexander Bigga , alexandre.belloni@bootlin.com Cc: linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org, nmydeen@mvista.com Subject: Re: [PATCH] rtc-m41t62: kickstart ocillator upon failure Message-ID: Reply-To: cminyard@mvista.com References: <20250116062641.366679-1-nmydeen@mvista.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; protocol="application/x-pkcs7-signature"; micalg=sha-256; boundary="ziNpAt5qh7l7+s0D" Content-Disposition: inline In-Reply-To: <20250116062641.366679-1-nmydeen@mvista.com> --ziNpAt5qh7l7+s0D Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Adding Alexander On Thu, Jan 16, 2025 at 11:56:41AM +0530, nmydeen@mvista.com wrote: > From: "A. Niyas Ahamed Mydeen" >=20 > The ocillator on the m41t62 (and other chips of this type) needs > a kickstart upon a failure; the RTC read routine will notice the > oscillator failure and fail reads. This is added in the RTC write > routine; this allows the system to know that the time in the RTC > is accurate. This is following the procedure described in section > 3.11 of "https://www.st.com/resource/en/datasheet/m41t62.pdf" Any comments on this? I just saw that Alexander wasn't on the email, not sure if they are still involved. -corey >=20 > Signed-off-by: A. Niyas Ahamed Mydeen > Reviewed-by: Corey Minyard > --- > drivers/rtc/rtc-m41t80.c | 70 ++++++++++++++++++++++++++++------------ > 1 file changed, 49 insertions(+), 21 deletions(-) >=20 > diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c > index 1f58ae8b151e..77c21c91bae3 100644 > --- a/drivers/rtc/rtc-m41t80.c > +++ b/drivers/rtc/rtc-m41t80.c > @@ -22,6 +22,7 @@ > #include > #include > #include > +#include > #ifdef CONFIG_RTC_DRV_M41T80_WDT > #include > #include > @@ -204,7 +205,7 @@ static int m41t80_rtc_read_time(struct device *dev, s= truct rtc_time *tm) > return flags; > =20 > if (flags & M41T80_FLAGS_OF) { > - dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); > + dev_err(&client->dev, "Oscillator failure, time may not be accurate, w= rite time to RTC to fix it.\n"); > return -EINVAL; > } > =20 > @@ -227,21 +228,60 @@ static int m41t80_rtc_read_time(struct device *dev,= struct rtc_time *tm) > return 0; > } > =20 > -static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) > +static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *in_t= m) > { > struct i2c_client *client =3D to_i2c_client(dev); > struct m41t80_data *clientdata =3D i2c_get_clientdata(client); > + struct rtc_time tm =3D *in_tm; > unsigned char buf[8]; > int err, flags; > + time64_t time =3D 0; > =20 > + flags =3D i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); > + if (flags < 0) > + return flags; > + if (flags & M41T80_FLAGS_OF) { > + /* OF cannot be immediately reset: oscillator has to be restarted. */ > + dev_warn(&client->dev, "OF bit is still set, kickstarting clock.\n"); > + err =3D i2c_smbus_write_byte_data(client, M41T80_REG_SEC, M41T80_SEC_S= T); > + if (err < 0) { > + dev_err(&client->dev, "Can't set ST bit\n"); > + return err; > + } > + err =3D i2c_smbus_write_byte_data(client, M41T80_REG_SEC, > + flags & ~M41T80_SEC_ST); > + if (err < 0) { > + dev_err(&client->dev, "Can't clear ST bit\n"); > + return err; > + } > + /* oscillator must run for 4sec before we attempt to reset OF bit */ > + msleep(4000); > + /* Clear the OF bit of Flags Register */ > + err =3D i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, > + flags & ~M41T80_FLAGS_OF); > + if (err < 0) { > + dev_err(&client->dev, "Unable to write flags register\n"); > + return err; > + } > + flags =3D i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); > + if (flags < 0) > + return flags; > + else if (flags & M41T80_FLAGS_OF) { > + dev_err(&client->dev, "Can't clear the OF bit check battery\n"); > + return err; > + } > + /* add 4sec of oscillator stablize time otherwise we are behind 4sec */ > + time =3D rtc_tm_to_time64(&tm); > + rtc_time64_to_tm(time+4, &tm); > + } > buf[M41T80_REG_SSEC] =3D 0; > - buf[M41T80_REG_SEC] =3D bin2bcd(tm->tm_sec); > - buf[M41T80_REG_MIN] =3D bin2bcd(tm->tm_min); > - buf[M41T80_REG_HOUR] =3D bin2bcd(tm->tm_hour); > - buf[M41T80_REG_DAY] =3D bin2bcd(tm->tm_mday); > - buf[M41T80_REG_MON] =3D bin2bcd(tm->tm_mon + 1); > - buf[M41T80_REG_YEAR] =3D bin2bcd(tm->tm_year - 100); > - buf[M41T80_REG_WDAY] =3D tm->tm_wday; > + buf[M41T80_REG_SEC] =3D bin2bcd(tm.tm_sec); > + buf[M41T80_REG_MIN] =3D bin2bcd(tm.tm_min); > + buf[M41T80_REG_HOUR] =3D bin2bcd(tm.tm_hour); > + buf[M41T80_REG_DAY] =3D bin2bcd(tm.tm_mday); > + buf[M41T80_REG_MON] =3D bin2bcd(tm.tm_mon + 1); > + buf[M41T80_REG_YEAR] =3D bin2bcd(tm.tm_year - 100); > + buf[M41T80_REG_WDAY] =3D tm.tm_wday; > =20 > /* If the square wave output is controlled in the weekday register */ > if (clientdata->features & M41T80_FEATURE_SQ_ALT) { > @@ -261,18 +301,6 @@ static int m41t80_rtc_set_time(struct device *dev, s= truct rtc_time *tm) > return err; > } > =20 > - /* Clear the OF bit of Flags Register */ > - flags =3D i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); > - if (flags < 0) > - return flags; > - > - err =3D i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, > - flags & ~M41T80_FLAGS_OF); > - if (err < 0) { > - dev_err(&client->dev, "Unable to write flags register\n"); > - return err; > - } > - > return err; > } > =20 > --=20 > 2.34.1 >=20 --ziNpAt5qh7l7+s0D Content-Type: application/x-pkcs7-signature Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIINIQYJKoZIhvcNAQcCoIINEjCCDQ4CAQExDzANBglghkgBZQMEAgEFADALBgkqhkiG9w0B BwGgggpVMIIFXzCCBEegAwIBAgIQD/rh8xorQzw9muFtZDtYizANBgkqhkiG9w0BAQsFADBl MQswCQYDVQQGEwJVUzEVMBMGA1UEChMMRGlnaUNlcnQgSW5jMRkwFwYDVQQLExB3d3cuZGln aWNlcnQuY29tMSQwIgYDVQQDExtEaWdpQ2VydCBBc3N1cmVkIElEIFJvb3QgRzIwHhcNMTkw OTIzMTIyNTMyWhcNMzQwOTIzMTIyNTMyWjBqMQswCQYDVQQGEwJVUzEVMBMGA1UEChMMRGln aUNlcnQgSW5jMRkwFwYDVQQLExB3d3cuZGlnaWNlcnQuY29tMSkwJwYDVQQDEyBEaWdpQ2Vy dCBBc3N1cmVkIElEIENsaWVudCBDQSBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoC ggEBAOqxRa06rLwKBvrDb/qQ8RtXfeKA9o0A42oZbLF4GYr4Xdt9JE8r3PJRIOUZD1U3mEln 4S/aZoS54Q+5Ecs3q2GGT/Z82VeAPLeGvJoT0LS5t/zXeUcbMuDFWgyj33kiesnuusnOWvpI SoxN+oBH4oo0+oUiHI65mMjMAlb93x6sabh9kKvHQvHC4x2u7wYv5+NXjnbOhJS/1NjGq+ug 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