From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8309A205AD9 for ; Wed, 12 Feb 2025 17:18:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739380709; cv=none; b=MCEBTPYJ52rYJIuqlkYsI1Qh/tUDbTh2T1xsCC7kO8w5dAO52T1qtu9qRpWGLEUQLq8wdYkodrkyyqhJ+wMdxETXZQejvDTc5dHCdm1BchbgLHZtd/1AG2kfLeuVHBfMvBb17OXx3CbE7U+XP8eVAdZjnFybp+WqhbMVfj/J4XM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739380709; c=relaxed/simple; bh=ZjYnAE16EGe/YsAAdLaejX/xYM/waPeuGE8ePV6a4+8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=j7XqoUTZhgBKDXJ8SeXnbnjXomNKA7tkgEBJbHnUqj8onGKCZtXn7WbJDbpaIs7terKrQU/grZX4Rq9ca5nni66kAyWLdHJQ4+ZtMSU7SXm8XurO6YQ3ChL4ROMMtY81AI8GghDMsO/SgGbbMRUCKalYk/6VBwqoQM3eS+hGCM4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id D15C2C4CEDF; Wed, 12 Feb 2025 17:18:23 +0000 (UTC) Date: Wed, 12 Feb 2025 17:18:21 +0000 From: Catalin Marinas To: Tong Tiangen Cc: Mark Rutland , Jonathan Cameron , Mauro Carvalho Chehab , Will Deacon , Andrew Morton , James Morse , Robin Murphy , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Michael Ellerman , Nicholas Piggin , Andrey Ryabinin , Alexander Potapenko , Christophe Leroy , "Aneesh Kumar K.V" , "Naveen N. Rao" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Madhavan Srinivasan , linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, wangkefeng.wang@huawei.com, Guohanjun Subject: Re: [PATCH v13 5/5] arm64: introduce copy_mc_to_kernel() implementation Message-ID: References: <20241209024257.3618492-1-tongtiangen@huawei.com> <20241209024257.3618492-6-tongtiangen@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241209024257.3618492-6-tongtiangen@huawei.com> On Mon, Dec 09, 2024 at 10:42:57AM +0800, Tong Tiangen wrote: > The copy_mc_to_kernel() helper is memory copy implementation that handles > source exceptions. It can be used in memory copy scenarios that tolerate > hardware memory errors(e.g: pmem_read/dax_copy_to_iter). > > Currently, only x86 and ppc support this helper, Add this for ARM64 as > well, if ARCH_HAS_COPY_MC is defined, by implementing copy_mc_to_kernel() > and memcpy_mc() functions. > > Because there is no caller-saved GPR is available for saving "bytes not > copied" in memcpy(), the memcpy_mc() is referenced to the implementation > of copy_from_user(). In addition, the fixup of MOPS insn is not considered > at present. Same question as on the previous patch, can we not avoid the memcpy() duplication if the only difference is entries in the exception table? IIUC in patch 2 fixup_exception() even ignores the new type. The error must come on the do_sea() path. -- Catalin