From: Niklas Cassel <cassel@kernel.org>
To: Shradha Todi <shradha.t@samsung.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org,
kw@linux.com, robh@kernel.org, bhelgaas@google.com,
jingoohan1@gmail.com, Jonathan.Cameron@huawei.com,
fan.ni@samsung.com, nifan.cxl@gmail.com,
a.manzanares@samsung.com, pankaj.dubey@samsung.com,
18255117159@163.com, quic_nitegupt@quicinc.com,
quic_krichai@quicinc.com, gost.dev@samsung.com
Subject: Re: [PATCH v6 0/4] Add support for debugfs based RAS DES feature in PCIe DW
Date: Wed, 19 Feb 2025 18:45:49 +0100 [thread overview]
Message-ID: <Z7YYzdN-MboQKIt-@ryzen> (raw)
In-Reply-To: <20250214105007.97582-1-shradha.t@samsung.com>
On Fri, Feb 14, 2025 at 04:20:03PM +0530, Shradha Todi wrote:
> DesignWare controller provides a vendor specific extended capability
> called RASDES as an IP feature. This extended capability provides
> hardware information like:
> - Debug registers to know the state of the link or controller.
> - Error injection mechanisms to inject various PCIe errors including
> sequence number, CRC
> - Statistical counters to know how many times a particular event
> occurred
>
> However, in Linux we do not have any generic or custom support to be
> able to use this feature in an efficient manner. This is the reason we
> are proposing this framework. Debug and bring up time of high-speed IPs
> are highly dependent on costlier hardware analyzers and this solution
> will in some ways help to reduce the HW analyzer usage.
>
> The debugfs entries can be used to get information about underlying
> hardware and can be shared with user space. Separate debugfs entries has
> been created to cater to all the DES hooks provided by the controller.
> The debugfs entries interacts with the RASDES registers in the required
> sequence and provides the meaningful data to the user. This eases the
> effort to understand and use the register information for debugging.
>
> This series creates a generic debugfs framework for DesignWare PCIe
> controllers where other debug features apart from RASDES can also be
> added as and when required.
FWIW, for the series:
Tested-by: Niklas Cassel <cassel@kernel.org>
next prev parent reply other threads:[~2025-02-19 17:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250214105330epcas5p13b0d5bef72b012d71e850c9454015880@epcas5p1.samsung.com>
2025-02-14 10:50 ` [PATCH v6 0/4] Add support for debugfs based RAS DES feature in PCIe DW Shradha Todi
2025-02-14 10:50 ` [PATCH v6 1/4] PCI: dwc: Add support for vendor specific capability search Shradha Todi
2025-02-18 14:41 ` Manivannan Sadhasivam
2025-02-20 6:14 ` Shradha Todi
2025-02-20 7:28 ` 'Manivannan Sadhasivam'
2025-02-14 10:50 ` [PATCH v6 2/4] Add debugfs based silicon debug support in DWC Shradha Todi
2025-02-18 15:02 ` Manivannan Sadhasivam
2025-02-20 9:18 ` Shradha Todi
2025-02-20 9:48 ` 'Manivannan Sadhasivam'
2025-02-14 10:50 ` [PATCH v6 3/4] Add debugfs based error injection " Shradha Todi
2025-02-20 6:06 ` Manivannan Sadhasivam
2025-02-14 10:50 ` [PATCH v6 4/4] Add debugfs based statistical counter " Shradha Todi
2025-02-20 6:17 ` Manivannan Sadhasivam
2025-02-19 17:45 ` Niklas Cassel [this message]
2025-02-21 13:22 ` [PATCH v6 0/4] Add support for debugfs based RAS DES feature in PCIe DW Shradha Todi
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