[PATCH v1 0/4] Introduce Intel Elkhart Lake PSE TIO

[PATCH v1 0/4] Introduce Intel Elkhart Lake PSE TIO

[Raag Jadav]

Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI
devices that expose two different capabilities of GPIO and Timed I/O
as a single PCI function through shared MMIO.

This series adds MFD driver for them and extends PPS generator driver
to support initial PSE TIO functionality.

Raag Jadav (4):
  pps: generators: tio: split pps_gen_tio.h
  pps: generators: tio: move to match_data() model
  pps: generators: tio: Introduce Intel Elkhart Lake PSE TIO
  mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

 MAINTAINERS                          |  5 ++
 drivers/mfd/Kconfig                  |  9 +++
 drivers/mfd/Makefile                 |  1 +
 drivers/mfd/intel-ehl-gpio.c         | 95 ++++++++++++++++++++++++++++
 drivers/pps/generators/pps_gen_tio.c | 74 +++++++++++-----------
 drivers/pps/generators/pps_gen_tio.h | 63 ++++++++++++++++++
 6 files changed, 211 insertions(+), 36 deletions(-)
 create mode 100644 drivers/mfd/intel-ehl-gpio.c
 create mode 100644 drivers/pps/generators/pps_gen_tio.h


base-commit: 264ff8415aed324584acc85740596f6e1df7b663
-- 
2.34.1

[PATCH v1 1/4] pps: generators: tio: split pps_gen_tio.h

[Raag Jadav]

Split macros and structure definition to header file for better
maintainability.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/pps/generators/pps_gen_tio.c | 30 +------------------
 drivers/pps/generators/pps_gen_tio.h | 45 ++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+), 29 deletions(-)
 create mode 100644 drivers/pps/generators/pps_gen_tio.h

diff --git a/drivers/pps/generators/pps_gen_tio.c b/drivers/pps/generators/pps_gen_tio.c
index 6c46b46c66cd..7f2aab1219af 100644
--- a/drivers/pps/generators/pps_gen_tio.c
+++ b/drivers/pps/generators/pps_gen_tio.c
@@ -5,8 +5,6 @@
  * Copyright (C) 2024 Intel Corporation
  */
 
-#include <linux/bitfield.h>
-#include <linux/bits.h>
 #include <linux/cleanup.h>
 #include <linux/container_of.h>
 #include <linux/device.h>
@@ -21,33 +19,7 @@
 
 #include <asm/cpu_device_id.h>
 
-#define TIOCTL			0x00
-#define TIOCOMPV		0x10
-#define TIOEC			0x30
-
-/* Control Register */
-#define TIOCTL_EN			BIT(0)
-#define TIOCTL_DIR			BIT(1)
-#define TIOCTL_EP			GENMASK(3, 2)
-#define TIOCTL_EP_RISING_EDGE		FIELD_PREP(TIOCTL_EP, 0)
-#define TIOCTL_EP_FALLING_EDGE		FIELD_PREP(TIOCTL_EP, 1)
-#define TIOCTL_EP_TOGGLE_EDGE		FIELD_PREP(TIOCTL_EP, 2)
-
-/* Safety time to set hrtimer early */
-#define SAFE_TIME_NS			(10 * NSEC_PER_MSEC)
-
-#define MAGIC_CONST			(NSEC_PER_SEC - SAFE_TIME_NS)
-#define ART_HW_DELAY_CYCLES		2
-
-struct pps_tio {
-	struct pps_gen_source_info gen_info;
-	struct pps_gen_device *pps_gen;
-	struct hrtimer timer;
-	void __iomem *base;
-	u32 prev_count;
-	spinlock_t lock;
-	struct device *dev;
-};
+#include "pps_gen_tio.h"
 
 static inline u32 pps_tio_read(u32 offset, struct pps_tio *tio)
 {
diff --git a/drivers/pps/generators/pps_gen_tio.h b/drivers/pps/generators/pps_gen_tio.h
new file mode 100644
index 000000000000..78d4d7c25221
--- /dev/null
+++ b/drivers/pps/generators/pps_gen_tio.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Intel PPS signal Generator Driver
+ *
+ * Copyright (C) 2025 Intel Corporation
+ */
+
+#ifndef _PPS_GEN_TIO_H_
+#define _PPS_GEN_TIO_H_
+
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+#include <linux/hrtimer.h>
+#include <linux/pps_gen_kernel.h>
+#include <linux/spinlock_types.h>
+
+#define TIOCTL			0x00
+#define TIOCOMPV		0x10
+#define TIOEC			0x30
+
+/* Control Register */
+#define TIOCTL_EN			BIT(0)
+#define TIOCTL_DIR			BIT(1)
+#define TIOCTL_EP			GENMASK(3, 2)
+#define TIOCTL_EP_RISING_EDGE		FIELD_PREP(TIOCTL_EP, 0)
+#define TIOCTL_EP_FALLING_EDGE		FIELD_PREP(TIOCTL_EP, 1)
+#define TIOCTL_EP_TOGGLE_EDGE		FIELD_PREP(TIOCTL_EP, 2)
+
+/* Safety time to set hrtimer early */
+#define SAFE_TIME_NS			(10 * NSEC_PER_MSEC)
+
+#define MAGIC_CONST			(NSEC_PER_SEC - SAFE_TIME_NS)
+#define ART_HW_DELAY_CYCLES		2
+
+struct pps_tio {
+	struct pps_gen_source_info gen_info;
+	struct pps_gen_device *pps_gen;
+	struct hrtimer timer;
+	void __iomem *base;
+	u32 prev_count;
+	spinlock_t lock;
+	struct device *dev;
+};
+
+#endif /* _PPS_GEN_TIO_H_ */
-- 
2.34.1

Re: [PATCH v1 1/4] pps: generators: tio: split pps_gen_tio.h

[Rodolfo Giometti]

On 26/02/25 07:15, Raag Jadav wrote:
> Split macros and structure definition to header file for better
> maintainability.
> 
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>

Acked-by: Rodolfo Giometti <giometti@enneenne.com>

> ---
>   drivers/pps/generators/pps_gen_tio.c | 30 +------------------
>   drivers/pps/generators/pps_gen_tio.h | 45 ++++++++++++++++++++++++++++
>   2 files changed, 46 insertions(+), 29 deletions(-)
>   create mode 100644 drivers/pps/generators/pps_gen_tio.h
> 
> diff --git a/drivers/pps/generators/pps_gen_tio.c b/drivers/pps/generators/pps_gen_tio.c
> index 6c46b46c66cd..7f2aab1219af 100644
> --- a/drivers/pps/generators/pps_gen_tio.c
> +++ b/drivers/pps/generators/pps_gen_tio.c
> @@ -5,8 +5,6 @@
>    * Copyright (C) 2024 Intel Corporation
>    */
>   
> -#include <linux/bitfield.h>
> -#include <linux/bits.h>
>   #include <linux/cleanup.h>
>   #include <linux/container_of.h>
>   #include <linux/device.h>
> @@ -21,33 +19,7 @@
>   
>   #include <asm/cpu_device_id.h>
>   
> -#define TIOCTL			0x00
> -#define TIOCOMPV		0x10
> -#define TIOEC			0x30
> -
> -/* Control Register */
> -#define TIOCTL_EN			BIT(0)
> -#define TIOCTL_DIR			BIT(1)
> -#define TIOCTL_EP			GENMASK(3, 2)
> -#define TIOCTL_EP_RISING_EDGE		FIELD_PREP(TIOCTL_EP, 0)
> -#define TIOCTL_EP_FALLING_EDGE		FIELD_PREP(TIOCTL_EP, 1)
> -#define TIOCTL_EP_TOGGLE_EDGE		FIELD_PREP(TIOCTL_EP, 2)
> -
> -/* Safety time to set hrtimer early */
> -#define SAFE_TIME_NS			(10 * NSEC_PER_MSEC)
> -
> -#define MAGIC_CONST			(NSEC_PER_SEC - SAFE_TIME_NS)
> -#define ART_HW_DELAY_CYCLES		2
> -
> -struct pps_tio {
> -	struct pps_gen_source_info gen_info;
> -	struct pps_gen_device *pps_gen;
> -	struct hrtimer timer;
> -	void __iomem *base;
> -	u32 prev_count;
> -	spinlock_t lock;
> -	struct device *dev;
> -};
> +#include "pps_gen_tio.h"
>   
>   static inline u32 pps_tio_read(u32 offset, struct pps_tio *tio)
>   {
> diff --git a/drivers/pps/generators/pps_gen_tio.h b/drivers/pps/generators/pps_gen_tio.h
> new file mode 100644
> index 000000000000..78d4d7c25221
> --- /dev/null
> +++ b/drivers/pps/generators/pps_gen_tio.h
> @@ -0,0 +1,45 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Intel PPS signal Generator Driver
> + *
> + * Copyright (C) 2025 Intel Corporation
> + */
> +
> +#ifndef _PPS_GEN_TIO_H_
> +#define _PPS_GEN_TIO_H_
> +
> +#include <linux/bitfield.h>
> +#include <linux/bits.h>
> +#include <linux/hrtimer.h>
> +#include <linux/pps_gen_kernel.h>
> +#include <linux/spinlock_types.h>
> +
> +#define TIOCTL			0x00
> +#define TIOCOMPV		0x10
> +#define TIOEC			0x30
> +
> +/* Control Register */
> +#define TIOCTL_EN			BIT(0)
> +#define TIOCTL_DIR			BIT(1)
> +#define TIOCTL_EP			GENMASK(3, 2)
> +#define TIOCTL_EP_RISING_EDGE		FIELD_PREP(TIOCTL_EP, 0)
> +#define TIOCTL_EP_FALLING_EDGE		FIELD_PREP(TIOCTL_EP, 1)
> +#define TIOCTL_EP_TOGGLE_EDGE		FIELD_PREP(TIOCTL_EP, 2)
> +
> +/* Safety time to set hrtimer early */
> +#define SAFE_TIME_NS			(10 * NSEC_PER_MSEC)
> +
> +#define MAGIC_CONST			(NSEC_PER_SEC - SAFE_TIME_NS)
> +#define ART_HW_DELAY_CYCLES		2
> +
> +struct pps_tio {
> +	struct pps_gen_source_info gen_info;
> +	struct pps_gen_device *pps_gen;
> +	struct hrtimer timer;
> +	void __iomem *base;
> +	u32 prev_count;
> +	spinlock_t lock;
> +	struct device *dev;
> +};
> +
> +#endif /* _PPS_GEN_TIO_H_ */

-- 
GNU/Linux Solutions                  e-mail: giometti@enneenne.com
Linux Device Driver                          giometti@linux.it
Embedded Systems                     phone:  +39 349 2432127
UNIX programming

Re: [PATCH v1 1/4] pps: generators: tio: split pps_gen_tio.h

[Andy Shevchenko]

On Wed, Feb 26, 2025 at 11:45:24AM +0530, Raag Jadav wrote:
> Split macros and structure definition to header file for better
> maintainability.

> +#ifndef _PPS_GEN_TIO_H_
> +#define _PPS_GEN_TIO_H_
> +
> +#include <linux/bitfield.h>
> +#include <linux/bits.h>
> +#include <linux/hrtimer.h>
> +#include <linux/pps_gen_kernel.h>
> +#include <linux/spinlock_types.h>

This missing time.h and types.h.

Also you need to add a forward declaration for the device.

struct device;

> +#define TIOCTL			0x00
> +#define TIOCOMPV		0x10
> +#define TIOEC			0x30
> +
> +/* Control Register */
> +#define TIOCTL_EN			BIT(0)
> +#define TIOCTL_DIR			BIT(1)
> +#define TIOCTL_EP			GENMASK(3, 2)
> +#define TIOCTL_EP_RISING_EDGE		FIELD_PREP(TIOCTL_EP, 0)
> +#define TIOCTL_EP_FALLING_EDGE		FIELD_PREP(TIOCTL_EP, 1)
> +#define TIOCTL_EP_TOGGLE_EDGE		FIELD_PREP(TIOCTL_EP, 2)
> +
> +/* Safety time to set hrtimer early */
> +#define SAFE_TIME_NS			(10 * NSEC_PER_MSEC)
> +
> +#define MAGIC_CONST			(NSEC_PER_SEC - SAFE_TIME_NS)
> +#define ART_HW_DELAY_CYCLES		2
> +
> +struct pps_tio {
> +	struct pps_gen_source_info gen_info;
> +	struct pps_gen_device *pps_gen;
> +	struct hrtimer timer;
> +	void __iomem *base;
> +	u32 prev_count;
> +	spinlock_t lock;
> +	struct device *dev;
> +};
> +
> +#endif /* _PPS_GEN_TIO_H_ */

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 1/4] pps: generators: tio: split pps_gen_tio.h

[Raag Jadav]

On Wed, Feb 26, 2025 at 02:45:26PM +0200, Andy Shevchenko wrote:
> On Wed, Feb 26, 2025 at 11:45:24AM +0530, Raag Jadav wrote:
> > Split macros and structure definition to header file for better
> > maintainability.
> 
> > +#ifndef _PPS_GEN_TIO_H_
> > +#define _PPS_GEN_TIO_H_
> > +
> > +#include <linux/bitfield.h>
> > +#include <linux/bits.h>
> > +#include <linux/hrtimer.h>
> > +#include <linux/pps_gen_kernel.h>
> > +#include <linux/spinlock_types.h>
> 
> This missing time.h and types.h.

Aren't they guaranteed by hrtimer.h and spinlock_types.h?

Raag

Re: [PATCH v1 1/4] pps: generators: tio: split pps_gen_tio.h

[Andy Shevchenko]

Thu, Feb 27, 2025 at 07:08:43AM +0200, Raag Jadav kirjoitti:
> On Wed, Feb 26, 2025 at 02:45:26PM +0200, Andy Shevchenko wrote:
> > On Wed, Feb 26, 2025 at 11:45:24AM +0530, Raag Jadav wrote:

...

> > > +#include <linux/bitfield.h>
> > > +#include <linux/bits.h>
> > > +#include <linux/hrtimer.h>
> > > +#include <linux/pps_gen_kernel.h>
> > > +#include <linux/spinlock_types.h>
> > 
> > This missing time.h and types.h.
> 
> Aren't they guaranteed by hrtimer.h and spinlock_types.h?

Nope, why? HR timer is only for HR timer specific definitions and APIs, how
does they are related?

time.h due to NSEC_PER_USEC (or what was there?) and types.h due to u32.

-- 
With Best Regards,
Andy Shevchenko

[PATCH v1 2/4] pps: generators: tio: move to match_data() model

[Raag Jadav]

Use device_get_match_data() which allows configuring platform
specific data like number of pins and MMIO registers for TIO.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/pps/generators/pps_gen_tio.c | 33 ++++++++++++++++++++--------
 drivers/pps/generators/pps_gen_tio.h | 19 +++++++++++++---
 2 files changed, 40 insertions(+), 12 deletions(-)

diff --git a/drivers/pps/generators/pps_gen_tio.c b/drivers/pps/generators/pps_gen_tio.c
index 7f2aab1219af..89b08301d21e 100644
--- a/drivers/pps/generators/pps_gen_tio.c
+++ b/drivers/pps/generators/pps_gen_tio.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/pps_gen_kernel.h>
+#include <linux/property.h>
 #include <linux/timekeeping.h>
 #include <linux/types.h>
 
@@ -21,6 +22,14 @@
 
 #include "pps_gen_tio.h"
 
+static const struct pps_tio_data pmc_data = {
+	.regs = {
+		.ctl = TIOCTL_PMC,
+		.compv = TIOCOMPV_PMC,
+		.ec = TIOEC_PMC,
+	},
+};
+
 static inline u32 pps_tio_read(u32 offset, struct pps_tio *tio)
 {
 	return readl(tio->base + offset);
@@ -28,7 +37,7 @@ static inline u32 pps_tio_read(u32 offset, struct pps_tio *tio)
 
 static inline void pps_ctl_write(u32 value, struct pps_tio *tio)
 {
-	writel(value, tio->base + TIOCTL);
+	writel(value, tio->base + tio->regs.ctl);
 }
 
 /*
@@ -37,7 +46,7 @@ static inline void pps_ctl_write(u32 value, struct pps_tio *tio)
  */
 static inline void pps_compv_write(u64 value, struct pps_tio *tio)
 {
-	hi_lo_writeq(value, tio->base + TIOCOMPV);
+	hi_lo_writeq(value, tio->base + tio->regs.compv);
 }
 
 static inline ktime_t first_event(struct pps_tio *tio)
@@ -49,7 +58,7 @@ static u32 pps_tio_disable(struct pps_tio *tio)
 {
 	u32 ctrl;
 
-	ctrl = pps_tio_read(TIOCTL, tio);
+	ctrl = pps_tio_read(tio->regs.ctl, tio);
 	pps_compv_write(0, tio);
 
 	ctrl &= ~TIOCTL_EN;
@@ -63,7 +72,7 @@ static void pps_tio_enable(struct pps_tio *tio)
 {
 	u32 ctrl;
 
-	ctrl = pps_tio_read(TIOCTL, tio);
+	ctrl = pps_tio_read(tio->regs.ctl, tio);
 	ctrl |= TIOCTL_EN;
 	pps_ctl_write(ctrl, tio);
 	tio->pps_gen->enabled = true;
@@ -112,7 +121,7 @@ static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer)
 	 * Check if any event is missed.
 	 * If an event is missed, TIO will be disabled.
 	 */
-	event_count = pps_tio_read(TIOEC, tio);
+	event_count = pps_tio_read(tio->regs.ec, tio);
 	if (tio->prev_count && tio->prev_count == event_count)
 		goto err;
 	tio->prev_count = event_count;
@@ -172,6 +181,7 @@ static int pps_tio_get_time(struct pps_gen_device *pps_gen,
 static int pps_gen_tio_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
+	const struct pps_tio_data *data;
 	struct pps_tio *tio;
 
 	if (!(cpu_feature_enabled(X86_FEATURE_TSC_KNOWN_FREQ) &&
@@ -184,6 +194,11 @@ static int pps_gen_tio_probe(struct platform_device *pdev)
 	if (!tio)
 		return -ENOMEM;
 
+	data = device_get_match_data(dev);
+	if (!data)
+		return -ENODEV;
+
+	tio->regs = data->regs;
 	tio->gen_info.use_system_clock = true;
 	tio->gen_info.enable = pps_tio_gen_enable;
 	tio->gen_info.get_time = pps_tio_get_time;
@@ -217,10 +232,10 @@ static void pps_gen_tio_remove(struct platform_device *pdev)
 }
 
 static const struct acpi_device_id intel_pmc_tio_acpi_match[] = {
-	{ "INTC1021" },
-	{ "INTC1022" },
-	{ "INTC1023" },
-	{ "INTC1024" },
+	{ "INTC1021", (kernel_ulong_t)&pmc_data },
+	{ "INTC1022", (kernel_ulong_t)&pmc_data },
+	{ "INTC1023", (kernel_ulong_t)&pmc_data },
+	{ "INTC1024", (kernel_ulong_t)&pmc_data },
 	{}
 };
 MODULE_DEVICE_TABLE(acpi, intel_pmc_tio_acpi_match);
diff --git a/drivers/pps/generators/pps_gen_tio.h b/drivers/pps/generators/pps_gen_tio.h
index 78d4d7c25221..e652f976e455 100644
--- a/drivers/pps/generators/pps_gen_tio.h
+++ b/drivers/pps/generators/pps_gen_tio.h
@@ -14,9 +14,10 @@
 #include <linux/pps_gen_kernel.h>
 #include <linux/spinlock_types.h>
 
-#define TIOCTL			0x00
-#define TIOCOMPV		0x10
-#define TIOEC			0x30
+/* PMC Registers */
+#define TIOCTL_PMC			0x00
+#define TIOCOMPV_PMC			0x10
+#define TIOEC_PMC			0x30
 
 /* Control Register */
 #define TIOCTL_EN			BIT(0)
@@ -32,9 +33,21 @@
 #define MAGIC_CONST			(NSEC_PER_SEC - SAFE_TIME_NS)
 #define ART_HW_DELAY_CYCLES		2
 
+struct pps_tio_regs {
+	u32 ctl;
+	u32 compv;
+	u32 ec;
+};
+
+struct pps_tio_data {
+	struct pps_tio_regs regs;
+	u32 num_pins;
+};
+
 struct pps_tio {
 	struct pps_gen_source_info gen_info;
 	struct pps_gen_device *pps_gen;
+	struct pps_tio_regs regs;
 	struct hrtimer timer;
 	void __iomem *base;
 	u32 prev_count;
-- 
2.34.1

Re: [PATCH v1 2/4] pps: generators: tio: move to match_data() model

[Rodolfo Giometti]

On 26/02/25 07:15, Raag Jadav wrote:
> Use device_get_match_data() which allows configuring platform
> specific data like number of pins and MMIO registers for TIO.
> 
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>

Acked-by: Rodolfo Giometti <giometti@enneenne.com>

> ---
>   drivers/pps/generators/pps_gen_tio.c | 33 ++++++++++++++++++++--------
>   drivers/pps/generators/pps_gen_tio.h | 19 +++++++++++++---
>   2 files changed, 40 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/pps/generators/pps_gen_tio.c b/drivers/pps/generators/pps_gen_tio.c
> index 7f2aab1219af..89b08301d21e 100644
> --- a/drivers/pps/generators/pps_gen_tio.c
> +++ b/drivers/pps/generators/pps_gen_tio.c
> @@ -14,6 +14,7 @@
>   #include <linux/module.h>
>   #include <linux/platform_device.h>
>   #include <linux/pps_gen_kernel.h>
> +#include <linux/property.h>
>   #include <linux/timekeeping.h>
>   #include <linux/types.h>
>   
> @@ -21,6 +22,14 @@
>   
>   #include "pps_gen_tio.h"
>   
> +static const struct pps_tio_data pmc_data = {
> +	.regs = {
> +		.ctl = TIOCTL_PMC,
> +		.compv = TIOCOMPV_PMC,
> +		.ec = TIOEC_PMC,
> +	},
> +};
> +
>   static inline u32 pps_tio_read(u32 offset, struct pps_tio *tio)
>   {
>   	return readl(tio->base + offset);
> @@ -28,7 +37,7 @@ static inline u32 pps_tio_read(u32 offset, struct pps_tio *tio)
>   
>   static inline void pps_ctl_write(u32 value, struct pps_tio *tio)
>   {
> -	writel(value, tio->base + TIOCTL);
> +	writel(value, tio->base + tio->regs.ctl);
>   }
>   
>   /*
> @@ -37,7 +46,7 @@ static inline void pps_ctl_write(u32 value, struct pps_tio *tio)
>    */
>   static inline void pps_compv_write(u64 value, struct pps_tio *tio)
>   {
> -	hi_lo_writeq(value, tio->base + TIOCOMPV);
> +	hi_lo_writeq(value, tio->base + tio->regs.compv);
>   }
>   
>   static inline ktime_t first_event(struct pps_tio *tio)
> @@ -49,7 +58,7 @@ static u32 pps_tio_disable(struct pps_tio *tio)
>   {
>   	u32 ctrl;
>   
> -	ctrl = pps_tio_read(TIOCTL, tio);
> +	ctrl = pps_tio_read(tio->regs.ctl, tio);
>   	pps_compv_write(0, tio);
>   
>   	ctrl &= ~TIOCTL_EN;
> @@ -63,7 +72,7 @@ static void pps_tio_enable(struct pps_tio *tio)
>   {
>   	u32 ctrl;
>   
> -	ctrl = pps_tio_read(TIOCTL, tio);
> +	ctrl = pps_tio_read(tio->regs.ctl, tio);
>   	ctrl |= TIOCTL_EN;
>   	pps_ctl_write(ctrl, tio);
>   	tio->pps_gen->enabled = true;
> @@ -112,7 +121,7 @@ static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer)
>   	 * Check if any event is missed.
>   	 * If an event is missed, TIO will be disabled.
>   	 */
> -	event_count = pps_tio_read(TIOEC, tio);
> +	event_count = pps_tio_read(tio->regs.ec, tio);
>   	if (tio->prev_count && tio->prev_count == event_count)
>   		goto err;
>   	tio->prev_count = event_count;
> @@ -172,6 +181,7 @@ static int pps_tio_get_time(struct pps_gen_device *pps_gen,
>   static int pps_gen_tio_probe(struct platform_device *pdev)
>   {
>   	struct device *dev = &pdev->dev;
> +	const struct pps_tio_data *data;
>   	struct pps_tio *tio;
>   
>   	if (!(cpu_feature_enabled(X86_FEATURE_TSC_KNOWN_FREQ) &&
> @@ -184,6 +194,11 @@ static int pps_gen_tio_probe(struct platform_device *pdev)
>   	if (!tio)
>   		return -ENOMEM;
>   
> +	data = device_get_match_data(dev);
> +	if (!data)
> +		return -ENODEV;
> +
> +	tio->regs = data->regs;
>   	tio->gen_info.use_system_clock = true;
>   	tio->gen_info.enable = pps_tio_gen_enable;
>   	tio->gen_info.get_time = pps_tio_get_time;
> @@ -217,10 +232,10 @@ static void pps_gen_tio_remove(struct platform_device *pdev)
>   }
>   
>   static const struct acpi_device_id intel_pmc_tio_acpi_match[] = {
> -	{ "INTC1021" },
> -	{ "INTC1022" },
> -	{ "INTC1023" },
> -	{ "INTC1024" },
> +	{ "INTC1021", (kernel_ulong_t)&pmc_data },
> +	{ "INTC1022", (kernel_ulong_t)&pmc_data },
> +	{ "INTC1023", (kernel_ulong_t)&pmc_data },
> +	{ "INTC1024", (kernel_ulong_t)&pmc_data },
>   	{}
>   };
>   MODULE_DEVICE_TABLE(acpi, intel_pmc_tio_acpi_match);
> diff --git a/drivers/pps/generators/pps_gen_tio.h b/drivers/pps/generators/pps_gen_tio.h
> index 78d4d7c25221..e652f976e455 100644
> --- a/drivers/pps/generators/pps_gen_tio.h
> +++ b/drivers/pps/generators/pps_gen_tio.h
> @@ -14,9 +14,10 @@
>   #include <linux/pps_gen_kernel.h>
>   #include <linux/spinlock_types.h>
>   
> -#define TIOCTL			0x00
> -#define TIOCOMPV		0x10
> -#define TIOEC			0x30
> +/* PMC Registers */
> +#define TIOCTL_PMC			0x00
> +#define TIOCOMPV_PMC			0x10
> +#define TIOEC_PMC			0x30
>   
>   /* Control Register */
>   #define TIOCTL_EN			BIT(0)
> @@ -32,9 +33,21 @@
>   #define MAGIC_CONST			(NSEC_PER_SEC - SAFE_TIME_NS)
>   #define ART_HW_DELAY_CYCLES		2
>   
> +struct pps_tio_regs {
> +	u32 ctl;
> +	u32 compv;
> +	u32 ec;
> +};
> +
> +struct pps_tio_data {
> +	struct pps_tio_regs regs;
> +	u32 num_pins;
> +};
> +
>   struct pps_tio {
>   	struct pps_gen_source_info gen_info;
>   	struct pps_gen_device *pps_gen;
> +	struct pps_tio_regs regs;
>   	struct hrtimer timer;
>   	void __iomem *base;
>   	u32 prev_count;

-- 
GNU/Linux Solutions                  e-mail: giometti@enneenne.com
Linux Device Driver                          giometti@linux.it
Embedded Systems                     phone:  +39 349 2432127
UNIX programming

Re: [PATCH v1 2/4] pps: generators: tio: move to match_data() model

[Andy Shevchenko]

On Wed, Feb 26, 2025 at 11:45:25AM +0530, Raag Jadav wrote:
> Use device_get_match_data() which allows configuring platform
> specific data like number of pins and MMIO registers for TIO.

...

> +static const struct pps_tio_data pmc_data = {
> +	.regs = {
> +		.ctl = TIOCTL_PMC,
> +		.compv = TIOCOMPV_PMC,
> +		.ec = TIOEC_PMC,
> +	},
> +};

Move this closer to its' user, i.e...

...somewhere here.


>  static const struct acpi_device_id intel_pmc_tio_acpi_match[] = {
> -	{ "INTC1021" },
> -	{ "INTC1022" },
> -	{ "INTC1023" },
> -	{ "INTC1024" },
> +	{ "INTC1021", (kernel_ulong_t)&pmc_data },
> +	{ "INTC1022", (kernel_ulong_t)&pmc_data },
> +	{ "INTC1023", (kernel_ulong_t)&pmc_data },
> +	{ "INTC1024", (kernel_ulong_t)&pmc_data },
>  	{}
>  };

-- 
With Best Regards,
Andy Shevchenko

[PATCH v1 3/4] pps: generators: tio: Introduce Intel Elkhart Lake PSE TIO

[Raag Jadav]

Add initial support for Intel Elkhart Lake PSE TIO controller.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/pps/generators/pps_gen_tio.c | 17 ++++++++++++++++-
 drivers/pps/generators/pps_gen_tio.h |  5 +++++
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/pps/generators/pps_gen_tio.c b/drivers/pps/generators/pps_gen_tio.c
index 89b08301d21e..8339d8c8f8bb 100644
--- a/drivers/pps/generators/pps_gen_tio.c
+++ b/drivers/pps/generators/pps_gen_tio.c
@@ -22,6 +22,14 @@
 
 #include "pps_gen_tio.h"
 
+static const struct pps_tio_data ehl_pse_data = {
+	.regs = {
+		.ctl = TIOCTL_PSE,
+		.compv = TIOCOMPV_PSE,
+		.ec = TIOEC_PSE,
+	},
+};
+
 static const struct pps_tio_data pmc_data = {
 	.regs = {
 		.ctl = TIOCTL_PMC,
@@ -240,9 +248,16 @@ static const struct acpi_device_id intel_pmc_tio_acpi_match[] = {
 };
 MODULE_DEVICE_TABLE(acpi, intel_pmc_tio_acpi_match);
 
+static const struct platform_device_id pps_gen_tio_ids[] = {
+	{ "pps-gen-tio", (kernel_ulong_t)&ehl_pse_data },
+	{ }
+};
+MODULE_DEVICE_TABLE(platform, pps_gen_tio_ids);
+
 static struct platform_driver pps_gen_tio_driver = {
 	.probe          = pps_gen_tio_probe,
 	.remove         = pps_gen_tio_remove,
+	.id_table	= pps_gen_tio_ids,
 	.driver         = {
 		.name                   = "intel-pps-gen-tio",
 		.acpi_match_table       = intel_pmc_tio_acpi_match,
@@ -255,5 +270,5 @@ MODULE_AUTHOR("Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>");
 MODULE_AUTHOR("Pandith N <pandith.n@intel.com>");
 MODULE_AUTHOR("Thejesh Reddy T R <thejesh.reddy.t.r@intel.com>");
 MODULE_AUTHOR("Subramanian Mohan <subramanian.mohan@intel.com>");
-MODULE_DESCRIPTION("Intel PMC Time-Aware IO Generator Driver");
+MODULE_DESCRIPTION("Intel Time-Aware IO Generator Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/pps/generators/pps_gen_tio.h b/drivers/pps/generators/pps_gen_tio.h
index e652f976e455..bbf5b994e7ff 100644
--- a/drivers/pps/generators/pps_gen_tio.h
+++ b/drivers/pps/generators/pps_gen_tio.h
@@ -14,6 +14,11 @@
 #include <linux/pps_gen_kernel.h>
 #include <linux/spinlock_types.h>
 
+/* EHL PSE Registers */
+#define TIOCTL_PSE			0x00
+#define TIOCOMPV_PSE			0x04
+#define TIOEC_PSE			0x24
+
 /* PMC Registers */
 #define TIOCTL_PMC			0x00
 #define TIOCOMPV_PMC			0x10
-- 
2.34.1

Re: [PATCH v1 3/4] pps: generators: tio: Introduce Intel Elkhart Lake PSE TIO

[Rodolfo Giometti]

On 26/02/25 07:15, Raag Jadav wrote:
> Add initial support for Intel Elkhart Lake PSE TIO controller.
> 
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>

Acked-by: Rodolfo Giometti <giometti@enneenne.com>

> ---
>   drivers/pps/generators/pps_gen_tio.c | 17 ++++++++++++++++-
>   drivers/pps/generators/pps_gen_tio.h |  5 +++++
>   2 files changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pps/generators/pps_gen_tio.c b/drivers/pps/generators/pps_gen_tio.c
> index 89b08301d21e..8339d8c8f8bb 100644
> --- a/drivers/pps/generators/pps_gen_tio.c
> +++ b/drivers/pps/generators/pps_gen_tio.c
> @@ -22,6 +22,14 @@
>   
>   #include "pps_gen_tio.h"
>   
> +static const struct pps_tio_data ehl_pse_data = {
> +	.regs = {
> +		.ctl = TIOCTL_PSE,
> +		.compv = TIOCOMPV_PSE,
> +		.ec = TIOEC_PSE,
> +	},
> +};
> +
>   static const struct pps_tio_data pmc_data = {
>   	.regs = {
>   		.ctl = TIOCTL_PMC,
> @@ -240,9 +248,16 @@ static const struct acpi_device_id intel_pmc_tio_acpi_match[] = {
>   };
>   MODULE_DEVICE_TABLE(acpi, intel_pmc_tio_acpi_match);
>   
> +static const struct platform_device_id pps_gen_tio_ids[] = {
> +	{ "pps-gen-tio", (kernel_ulong_t)&ehl_pse_data },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(platform, pps_gen_tio_ids);
> +
>   static struct platform_driver pps_gen_tio_driver = {
>   	.probe          = pps_gen_tio_probe,
>   	.remove         = pps_gen_tio_remove,
> +	.id_table	= pps_gen_tio_ids,
>   	.driver         = {
>   		.name                   = "intel-pps-gen-tio",
>   		.acpi_match_table       = intel_pmc_tio_acpi_match,
> @@ -255,5 +270,5 @@ MODULE_AUTHOR("Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>");
>   MODULE_AUTHOR("Pandith N <pandith.n@intel.com>");
>   MODULE_AUTHOR("Thejesh Reddy T R <thejesh.reddy.t.r@intel.com>");
>   MODULE_AUTHOR("Subramanian Mohan <subramanian.mohan@intel.com>");
> -MODULE_DESCRIPTION("Intel PMC Time-Aware IO Generator Driver");
> +MODULE_DESCRIPTION("Intel Time-Aware IO Generator Driver");
>   MODULE_LICENSE("GPL");
> diff --git a/drivers/pps/generators/pps_gen_tio.h b/drivers/pps/generators/pps_gen_tio.h
> index e652f976e455..bbf5b994e7ff 100644
> --- a/drivers/pps/generators/pps_gen_tio.h
> +++ b/drivers/pps/generators/pps_gen_tio.h
> @@ -14,6 +14,11 @@
>   #include <linux/pps_gen_kernel.h>
>   #include <linux/spinlock_types.h>
>   
> +/* EHL PSE Registers */
> +#define TIOCTL_PSE			0x00
> +#define TIOCOMPV_PSE			0x04
> +#define TIOEC_PSE			0x24
> +
>   /* PMC Registers */
>   #define TIOCTL_PMC			0x00
>   #define TIOCOMPV_PMC			0x10

-- 
GNU/Linux Solutions                  e-mail: giometti@enneenne.com
Linux Device Driver                          giometti@linux.it
Embedded Systems                     phone:  +39 349 2432127
UNIX programming

Re: [PATCH v1 3/4] pps: generators: tio: Introduce Intel Elkhart Lake PSE TIO

[Andy Shevchenko]

On Wed, Feb 26, 2025 at 11:45:26AM +0530, Raag Jadav wrote:
> Add initial support for Intel Elkhart Lake PSE TIO controller.

...

> +static const struct pps_tio_data ehl_pse_data = {
> +	.regs = {
> +		.ctl = TIOCTL_PSE,
> +		.compv = TIOCOMPV_PSE,
> +		.ec = TIOEC_PSE,
> +	},
> +};

Same as previous comment, please move it further in the code closer to the ID
table which is the user of this data.

-- 
With Best Regards,
Andy Shevchenko

[PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

[Raag Jadav]

Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI
devices that expose two different capabilities of GPIO and Timed I/O
as a single PCI function through shared MMIO.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 MAINTAINERS                  |  5 ++
 drivers/mfd/Kconfig          |  9 ++++
 drivers/mfd/Makefile         |  1 +
 drivers/mfd/intel-ehl-gpio.c | 95 ++++++++++++++++++++++++++++++++++++
 4 files changed, 110 insertions(+)
 create mode 100644 drivers/mfd/intel-ehl-gpio.c

diff --git a/MAINTAINERS b/MAINTAINERS
index d4280facbe51..7e50a6892878 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11643,6 +11643,11 @@ F:	drivers/gpio/gpio-sodaville.c
 F:	drivers/gpio/gpio-tangier.c
 F:	drivers/gpio/gpio-tangier.h
 
+INTEL GPIO MFD DRIVER
+M:	Raag Jadav <raag.jadav@intel.com>
+S:	Supported
+F:	drivers/mfd/intel-ehl-gpio.c
+
 INTEL GVT-g DRIVERS (Intel GPU Virtualization)
 M:	Zhenyu Wang <zhenyuw@linux.intel.com>
 M:	Zhi Wang <zhi.wang.linux@gmail.com>
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 6b0682af6e32..8ba3db736a8f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -609,6 +609,15 @@ config MFD_INTEL_QUARK_I2C_GPIO
 	  their respective IO driver.
 	  The GPIO exports a total amount of 8 interrupt-capable GPIOs.
 
+config MFD_INTEL_EHL_PSE_GPIO
+	tristate "Intel Elkhart Lake PSE GPIO MFD"
+	depends on PCI && (X86 || COMPILE_TEST)
+	select MFD_CORE
+	help
+	  This MFD provides support for GPIO and TIO that exist on Intel
+	  Elkhart Lake PSE as a single PCI device. It splits the two I/O
+	  devices to their respective I/O drivers.
+
 config LPC_ICH
 	tristate "Intel ICH LPC"
 	depends on PCI
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 9220eaf7cf12..bf7245fb6824 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -197,6 +197,7 @@ obj-$(CONFIG_PMIC_ADP5520)	+= adp5520.o
 obj-$(CONFIG_MFD_ADP5585)	+= adp5585.o
 obj-$(CONFIG_MFD_KEMPLD)	+= kempld-core.o
 obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO)	+= intel_quark_i2c_gpio.o
+obj-$(CONFIG_MFD_INTEL_EHL_PSE_GPIO)	+= intel-ehl-gpio.o
 obj-$(CONFIG_LPC_SCH)		+= lpc_sch.o
 obj-$(CONFIG_LPC_ICH)		+= lpc_ich.o
 obj-$(CONFIG_MFD_RDC321X)	+= rdc321x-southbridge.o
diff --git a/drivers/mfd/intel-ehl-gpio.c b/drivers/mfd/intel-ehl-gpio.c
new file mode 100644
index 000000000000..039c74c64848
--- /dev/null
+++ b/drivers/mfd/intel-ehl-gpio.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Intel Multi-Functional driver for Elkhart Lake - Programmable
+ * Service Engine (PSE) GPIO & TIO
+ *
+ * Copyright (c) 2025 Intel Corporation
+ *
+ * Intel Elkhart Lake PSE includes two PCI devices that expose two
+ * different capabilities of GPIO and Timed I/O as a single PCI
+ * function through shared MMIO.
+ */
+
+#include <linux/array_size.h>
+#include <linux/ioport.h>
+#include <linux/mfd/core.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+
+#define PSE_GPIO_OFFSET		0x0000
+#define PSE_GPIO_SIZE		0x0134
+
+#define PSE_TIO_OFFSET		0x1000
+#define PSE_TIO_SIZE		0x06B0
+
+static struct resource ehl_pse_gpio_resources[] = {
+	DEFINE_RES_MEM(PSE_GPIO_OFFSET, PSE_GPIO_SIZE),
+	DEFINE_RES_IRQ(0),
+};
+
+static struct resource ehl_pse_tio_resources[] = {
+	DEFINE_RES_MEM(PSE_TIO_OFFSET, PSE_TIO_SIZE),
+	DEFINE_RES_IRQ(1),
+};
+
+static struct mfd_cell ehl_pse_gpio_devs[] = {
+	{
+		.name = "gpio-elkhartlake",
+		.num_resources = ARRAY_SIZE(ehl_pse_gpio_resources),
+		.resources = ehl_pse_gpio_resources,
+		.ignore_resource_conflicts = true,
+	},
+	{
+		.name = "pps-gen-tio",
+		.num_resources = ARRAY_SIZE(ehl_pse_tio_resources),
+		.resources = ehl_pse_tio_resources,
+		.ignore_resource_conflicts = true,
+	},
+};
+
+static int ehl_pse_gpio_probe(struct pci_dev *pci, const struct pci_device_id *id)
+{
+	int ret;
+
+	ret = pcim_enable_device(pci);
+	if (ret)
+		return ret;
+
+	pci_set_master(pci);
+
+	ret = pci_alloc_irq_vectors(pci, 2, 2, PCI_IRQ_ALL_TYPES);
+	if (ret < 0)
+		return ret;
+
+	return mfd_add_devices(&pci->dev, PLATFORM_DEVID_AUTO, ehl_pse_gpio_devs,
+			       ARRAY_SIZE(ehl_pse_gpio_devs), &pci->resource[0],
+			       pci_irq_vector(pci, 0), NULL);
+}
+
+static void ehl_pse_gpio_remove(struct pci_dev *pdev)
+{
+	mfd_remove_devices(&pdev->dev);
+	pci_free_irq_vectors(pdev);
+}
+
+static const struct pci_device_id ehl_pse_gpio_ids[] = {
+	{ PCI_VDEVICE(INTEL, 0x4b88) },
+	{ PCI_VDEVICE(INTEL, 0x4b89) },
+	{}
+};
+MODULE_DEVICE_TABLE(pci, ehl_pse_gpio_ids);
+
+static struct pci_driver ehl_pse_gpio_driver = {
+	.probe		= ehl_pse_gpio_probe,
+	.remove		= ehl_pse_gpio_remove,
+	.id_table	= ehl_pse_gpio_ids,
+	.name		= "ehl_pse_gpio",
+};
+module_pci_driver(ehl_pse_gpio_driver);
+
+MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
+MODULE_AUTHOR("Raag Jadav <raag.jadav@intel.com>");
+MODULE_DESCRIPTION("Intel MFD for Elkhart Lake PSE GPIO & TIO");
+MODULE_LICENSE("GPL");
-- 
2.34.1

Re: [PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

[Andy Shevchenko]

On Wed, Feb 26, 2025 at 11:45:27AM +0530, Raag Jadav wrote:
> Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI
> devices that expose two different capabilities of GPIO and Timed I/O
> as a single PCI function through shared MMIO.

...

> +config MFD_INTEL_EHL_PSE_GPIO
> +	tristate "Intel Elkhart Lake PSE GPIO MFD"
> +	depends on PCI && (X86 || COMPILE_TEST)
> +	select MFD_CORE
> +	help
> +	  This MFD provides support for GPIO and TIO that exist on Intel
> +	  Elkhart Lake PSE as a single PCI device. It splits the two I/O
> +	  devices to their respective I/O drivers.

Can you add a module name here?

...

> +++ b/drivers/mfd/intel-ehl-gpio.c

We are usually align the file name and Kconfig option, and I like Kconfig
choice, so intel_ehl_pse_gpio.c (also note the style with other intel_$SOC_*
files in the folder.

...

> +#include <linux/array_size.h>
> +#include <linux/ioport.h>
> +#include <linux/mfd/core.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/pci.h>

+ stddef.h // for NULL

...

> +	return mfd_add_devices(&pci->dev, PLATFORM_DEVID_AUTO, ehl_pse_gpio_devs,
> +			       ARRAY_SIZE(ehl_pse_gpio_devs), &pci->resource[0],

We have a helper pci_resource_n().

> +			       pci_irq_vector(pci, 0), NULL);

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

[Andy Shevchenko]

On Wed, Feb 26, 2025 at 03:20:35PM +0200, Andy Shevchenko wrote:
> On Wed, Feb 26, 2025 at 11:45:27AM +0530, Raag Jadav wrote:

...

> > +++ b/drivers/mfd/intel-ehl-gpio.c
> 
> We are usually align the file name and Kconfig option, and I like Kconfig
> choice, so intel_ehl_pse_gpio.c (also note the style with other intel_$SOC_*
> files in the folder.

And also Subject, you have currently 3 different names for the same:
Kconfig, Subject, filename.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

[Raag Jadav]

On Wed, Feb 26, 2025 at 03:22:24PM +0200, Andy Shevchenko wrote:
> On Wed, Feb 26, 2025 at 03:20:35PM +0200, Andy Shevchenko wrote:
> > On Wed, Feb 26, 2025 at 11:45:27AM +0530, Raag Jadav wrote:
> 
> ...
> 
> > > +++ b/drivers/mfd/intel-ehl-gpio.c
> > 
> > We are usually align the file name and Kconfig option, and I like Kconfig
> > choice, so intel_ehl_pse_gpio.c (also note the style with other intel_$SOC_*
> > files in the folder.

More than 3 words is a bit of an overstretch, no?

> And also Subject, you have currently 3 different names for the same:
> Kconfig, Subject, filename.

Yeah just trying to dial down the acronym syndrome, you know how it has
plagued our minds.

Raag

Re: [PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

[Andy Shevchenko]

Thu, Feb 27, 2025 at 07:13:36AM +0200, Raag Jadav kirjoitti:
> On Wed, Feb 26, 2025 at 03:22:24PM +0200, Andy Shevchenko wrote:
> > On Wed, Feb 26, 2025 at 03:20:35PM +0200, Andy Shevchenko wrote:
> > > On Wed, Feb 26, 2025 at 11:45:27AM +0530, Raag Jadav wrote:

...

> > > > +++ b/drivers/mfd/intel-ehl-gpio.c
> > > 
> > > We are usually align the file name and Kconfig option, and I like Kconfig
> > > choice, so intel_ehl_pse_gpio.c (also note the style with other intel_$SOC_*
> > > files in the folder.
> 
> More than 3 words is a bit of an overstretch, no?

No, it's short enough.

....

> > And also Subject, you have currently 3 different names for the same:
> > Kconfig, Subject, filename.
> 
> Yeah just trying to dial down the acronym syndrome, you know how it has
> plagued our minds.

Right, but in MFD we are trying to follow some common schema(s) for file names.
Currently the most clear one is for PMIC drivers. Let's keep going with the
rest as well.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

[Raag Jadav]

On Thu, Feb 27, 2025 at 09:20:26AM +0200, Andy Shevchenko wrote:
> Thu, Feb 27, 2025 at 07:13:36AM +0200, Raag Jadav kirjoitti:
> > On Wed, Feb 26, 2025 at 03:22:24PM +0200, Andy Shevchenko wrote:
> > > On Wed, Feb 26, 2025 at 03:20:35PM +0200, Andy Shevchenko wrote:
> > > > On Wed, Feb 26, 2025 at 11:45:27AM +0530, Raag Jadav wrote:

...

> > > And also Subject, you have currently 3 different names for the same:
> > > Kconfig, Subject, filename.
> > 
> > Yeah just trying to dial down the acronym syndrome, you know how it has
> > plagued our minds.
> 
> Right, but in MFD we are trying to follow some common schema(s) for file names.
> Currently the most clear one is for PMIC drivers. Let's keep going with the
> rest as well.

Sure, I'm also a bit confused about how to wire up Kconfig here.
Should PPS select MFD or depend on it?

Raag

Re: [PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO

[Andy Shevchenko]

On Thu, Feb 27, 2025 at 4:03 PM Raag Jadav <raag.jadav@intel.com> wrote:
> On Thu, Feb 27, 2025 at 09:20:26AM +0200, Andy Shevchenko wrote:
> > Thu, Feb 27, 2025 at 07:13:36AM +0200, Raag Jadav kirjoitti:
> > > On Wed, Feb 26, 2025 at 03:22:24PM +0200, Andy Shevchenko wrote:
> > > > On Wed, Feb 26, 2025 at 03:20:35PM +0200, Andy Shevchenko wrote:
> > > > > On Wed, Feb 26, 2025 at 11:45:27AM +0530, Raag Jadav wrote:

...

> > > > And also Subject, you have currently 3 different names for the same:
> > > > Kconfig, Subject, filename.
> > >
> > > Yeah just trying to dial down the acronym syndrome, you know how it has
> > > plagued our minds.
> >
> > Right, but in MFD we are trying to follow some common schema(s) for file names.
> > Currently the most clear one is for PMIC drivers. Let's keep going with the
> > rest as well.
>
> Sure, I'm also a bit confused about how to wire up Kconfig here.
> Should PPS select MFD or depend on it?

Intel MFD drivers seem to select MFD_CORE.
Drivers that are using those ones are usually dependent on the
respective MFD drivers.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 0/4] Introduce Intel Elkhart Lake PSE TIO

[Andy Shevchenko]

On Wed, Feb 26, 2025 at 11:45:23AM +0530, Raag Jadav wrote:
> Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI
> devices that expose two different capabilities of GPIO and Timed I/O
> as a single PCI function through shared MMIO.
> 
> This series adds MFD driver for them and extends PPS generator driver
> to support initial PSE TIO functionality.

A few comments here and there, after addressing them
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

(Nice small driver, thanks!)

-- 
With Best Regards,
Andy Shevchenko