From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 827531F37CE for ; Tue, 4 Mar 2025 09:55:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741082151; cv=none; b=dU13/WDbfEoVB4cRxQt0XvkVVCOOGJxHLnY/WYDkSsjKi5CSnJpCroRVGVTX6kgeAL0kWFLnbN7Q44SzlLAAvzRseakITpHlyezxpNiYcQD2xTG2klsvFs7BEV6o1CrDKHHFDXm0J1ITijWcJFTV6Dd6MfKfw4QT+C0jOqBEmYY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741082151; c=relaxed/simple; bh=Vg0JIHG39DDeLKayInuouwopWCmilHvmKYPuJMTkmSo=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=OUzz7ztleYiR1DjiS0ZO5We/BVg+oBn0OaNsyH89NX7y3ulKAjSFWIWXNqWNS0vdbanb3e2CfF2BZ/TBMUUcuNqskfBpa2zjx1Q8j0tvYwS013eBj1CHtcmI1hCzkYYPCHR3Dy4Nv81l1lklI3TJ7jlHDkxlKLMlnBBbVt2IMIs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TRaCxbUH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TRaCxbUH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 359F5C4CEE5; Tue, 4 Mar 2025 09:55:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741082151; bh=Vg0JIHG39DDeLKayInuouwopWCmilHvmKYPuJMTkmSo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TRaCxbUHvz/dBwnYK2JGN4xmuLxPLFUpREo+EeC5RF8PCXfwIomceblSiUaXLcWXX RPXo1UiMPW/+BhZKF7RrWJOTw6iilcTCv+Ko7SvmAp9Ati8cBAxlX5c/LBwq7Uq/3M uNQ0TCC9gYQV09wvTF/Zt1OxOduCF2kMrO4WGoh/WNj3qU17mt38e2QlAOslibAgSO wHX94F2RrNjKIHkCHJeJU5Q2ryFHSFGvvwmqgS1ldVuwdzYCV09dEehb2XLkE90l/M Di9WAG2ddmzeSfHOVR07uybmiaEeBMPuDpCNON4qzrLZaqSv0RuLWP+hsSXrm75CP1 vf8aOb88WnlHQ== Date: Tue, 4 Mar 2025 10:55:45 +0100 From: Ingo Molnar To: Uros Bizjak Cc: Brian Gerst , linux-kernel@vger.kernel.org, x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Borislav Petkov , Ard Biesheuvel , Linus Torvalds , Andy Lutomirski , Peter Zijlstra , Andrew Morton Subject: Re: [PATCH v3 00/11] Add a percpu subsection for cache hot data Message-ID: References: <20250303165246.2175811-1-brgerst@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: * Uros Bizjak wrote: > On Tue, Mar 4, 2025 at 10:48 AM Ingo Molnar wrote: > > > > > > * Brian Gerst wrote: > > > > > On Tue, Mar 4, 2025 at 3:47 AM Ingo Molnar wrote: > > > > > > > > > > > > * Brian Gerst wrote: > > > > > > > > > > > > > > > > - PERCPU_SECTION(INTERNODE_CACHE_BYTES) > > > > > > + PERCPU_SECTION(L1_CACHE_BYTES) > > > > > > ASSERT(__per_cpu_hot_end - __per_cpu_hot_start <= 64, "percpu cache hot section too large") > > > > > > > > > > > > RUNTIME_CONST_VARIABLES > > > > > > > > > > > > > > > > That is probably the right call. The initial percpu section is just > > > > > used by the boot cpu early and as a template for the dynamically > > > > > allocated percpu memory, which should account for the proper > > > > > alignment for NUMA. > > > > > > > > Okay. > > > > > > > > Randconfig testing found another corner case with the attached config: > > > > > > > > KSYMS .tmp_vmlinux0.kallsyms.S > > > > AS .tmp_vmlinux0.kallsyms.o > > > > LD .tmp_vmlinux1 > > > > ld: percpu cache hot section too large > > > > make[2]: *** [scripts/Makefile.vmlinux:77: vmlinux] Error 1 > > > > > > > > (I haven't figured out the root cause yet.) > > > > > > CONFIG_MPENTIUM4 sets X86_L1_CACHE_SHIFT to 7 (128 bytes). > > > > Hm, to resolve this I'd go for the easy out of explicitly using '64' as > > the size limit - like we did it in the C space. > > Why not simply: > > ASSERT(__per_cpu_hot_end - __per_cpu_hot_start <= L1_CACHE_BYTES, "...") > > ? I don't think it's a great idea to randomly allow a larger section depending on the .config ... The *actual* intended limit is 64, not 128 and not 4096, so I'd suggest we write it out as before. Thanks, Ingo