From: Niklas Cassel <cassel@kernel.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: "Jesper Nilsson" <jesper.nilsson@axis.com>,
"Lars Persson" <lars.persson@axis.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-arm-kernel@axis.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH RFC NOT TESTED 0/2] PCI: artpec6: Try to clean up artpec6_pcie_cpu_addr_fixup()
Date: Wed, 5 Mar 2025 12:18:56 +0100 [thread overview]
Message-ID: <Z8gxdWaU1N71pyj-@ryzen> (raw)
In-Reply-To: <20250304-axis-v1-0-ed475ab3a3ed@nxp.com>
Hello Frank, all,
On Tue, Mar 04, 2025 at 12:49:34PM -0500, Frank Li wrote:
> This patches basic on
> https://lore.kernel.org/imx/20250128-pci_fixup_addr-v9-0-3c4bb506f665@nxp.com/
>
> I have not hardware to test and there are not axis,artpec7-pcie in kernel
> tree.
If you do a simple:
$ git grep artpec7
You will see that there are just two drivers that support this SoC:
drivers/pci/controller/dwc/pcie-artpec6.c
drivers/crypto/axis/artpec6_crypto.c
and their matching DT bindings:
Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
Documentation/devicetree/bindings/crypto/artpec6-crypto.txt
I think that at some point in the there was an intent to upstream support
for the ARTPEC-7 SoC, but now many years later, that hasn't happened,
as there is not even a artpec7 dtsi.
I think the nicest thing to the community is to drop artpec7 support from
these two drivers, and deprecate the artpec7 compatibles in the DT bindings,
as it is obviously making your life harder when trying to do improvements.
>
> Look for driver owner, who help test this and start move forward to remove
> cpu_addr_fixup() work.
While I'm the original author of this PCIe driver, I do no longer have
access to the hardware and documentation, so I cannot test.
For anyone interested in the cleanup Frank is doing, see:
https://lore.kernel.org/linux-pci/Z8d96Qbggv117LlO@lizhi-Precision-Tower-5810/T/#m0ff14edaf871293ba16acd85e7942adacb603c6c
Looking at your cover-letter for the series above,
creating a simple-bus with:
ranges = <0x0 0xc0000000 0x20000000>
and handling that in PCIe DWC common code does look nicer compared to
having a .cpu_addr_fixup() callback in each PCIe DWC glue driver.
Hopefully someone with access to the hardware can test your series +
this RFC.
Kind regards,
Niklas
next prev parent reply other threads:[~2025-03-05 11:19 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-04 17:49 [PATCH RFC NOT TESTED 0/2] PCI: artpec6: Try to clean up artpec6_pcie_cpu_addr_fixup() Frank Li
2025-03-04 17:49 ` [PATCH RFC NOT TESTED 1/2] ARM: dts: artpec6: Move PCIe nodes under bus@c0000000 Frank Li
2025-03-04 17:49 ` [PATCH RFC NOT TESTED 2/2] PCI: artpec6: Use use_parent_dt_ranges and clean up artpec6_pcie_cpu_addr_fixup() Frank Li
2025-03-04 19:08 ` Bjorn Helgaas
2025-03-04 20:12 ` Frank Li
2025-03-04 20:31 ` Bjorn Helgaas
2025-03-04 21:02 ` Frank Li
2025-03-05 11:18 ` Niklas Cassel [this message]
2025-03-05 11:26 ` [PATCH RFC NOT TESTED 0/2] PCI: artpec6: Try to " Niklas Cassel
2025-03-05 15:33 ` Jesper Nilsson
2025-03-10 16:47 ` Jesper Nilsson
2025-03-10 20:45 ` Frank Li
2025-03-17 17:54 ` Bjorn Helgaas
2025-03-18 9:01 ` Niklas Cassel
2025-03-20 21:54 ` Bjorn Helgaas
2025-03-21 17:17 ` Jesper Nilsson
2025-03-21 17:54 ` Bjorn Helgaas
2025-03-11 15:19 ` Rob Herring (Arm)
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