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From: Ingo Molnar <mingo@kernel.org>
To: Dave Hansen <dave.hansen@intel.com>
Cc: Eric Biggers <ebiggers@kernel.org>,
	x86@kernel.org, linux-crypto@vger.kernel.org,
	linux-kernel@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	Ben Greear <greearb@candelatech.com>,
	Xiao Liang <shaw.leon@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	"Jason A . Donenfeld" <Jason@zx2c4.com>,
	"Bae, Chang Seok" <chang.seok.bae@intel.com>
Subject: Re: [RFC PATCH v2] x86/fpu: make kernel-mode FPU reliably usable in softirqs
Date: Wed, 5 Mar 2025 19:13:05 +0100	[thread overview]
Message-ID: <Z8iUMRGyUpgisuc_@gmail.com> (raw)
In-Reply-To: <65c29e20-8d63-4323-b2e5-09e2e7bf3c1c@intel.com>


* Dave Hansen <dave.hansen@intel.com> wrote:

> On 3/5/25 09:37, Ingo Molnar wrote:
> > 
> > * Dave Hansen <dave.hansen@intel.com> wrote:
> > 
> >> On 3/5/25 01:07, Ingo Molnar wrote:>> Alternatives considered:
> >>>> - Make kernel-mode FPU sections fully preemptible.  This would require
> >>>>   growing task_struct by another struct fpstate which is more than 2K.
> >>>
> >>> So that's something that will probably happen once the kernel is built 
> >>> using APX anyway?
> >>
> >> I was expecting that building the kernel with APX would be very 
> >> different than a kernel_fpu_begin(). We don't just need *one* more 
> >> save area for APX registers: we need a stack, just like normal GPRs.
> > 
> > Yes - but my point is: with any APX build we'd probably be saving 
> > FPU(-ish) registers at entry points, into a separate context area. If 
> > that includes FPU registers then we'd not have to do 
> > kernel_fpu_begin()/end().
> 
> That's true. But wouldn't it be a bit silly to include _all_ FPU
> registers? If the kernel isn't using AVX512, why bother saving and
> restoring AVX512?

Fair enough - although I bet the execution time difference between a 
partial and a full FPU context save isn't as large as the buffer size 
would suggest... There's a lot of setup cost in XSAVE* instructions 
last I checked.

Thanks,

	Ingo

  reply	other threads:[~2025-03-05 18:13 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-04 20:49 [RFC PATCH v2] x86/fpu: make kernel-mode FPU reliably usable in softirqs Eric Biggers
2025-03-05  9:07 ` Ingo Molnar
2025-03-05 16:55   ` Dave Hansen
2025-03-05 17:37     ` Ingo Molnar
2025-03-05 18:04       ` Dave Hansen
2025-03-05 18:13         ` Ingo Molnar [this message]
2025-03-05 21:22       ` David Laight
2025-03-05 17:39   ` Eric Biggers
2025-03-05 18:09     ` Ingo Molnar
2025-03-05 20:30       ` Eric Biggers
2025-03-06 11:42         ` Ingo Molnar
2025-03-06 12:09   ` Peter Zijlstra
2025-03-06 12:00 ` [tip: x86/fpu] x86/fpu: Improve crypto performance by making " tip-bot2 for Eric Biggers
2025-03-06 17:54   ` Eric Biggers

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