From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: mailhol.vincent@wanadoo.fr
Cc: Yury Norov <yury.norov@gmail.com>,
Lucas De Marchi <lucas.demarchi@intel.com>,
Rasmus Villemoes <linux@rasmusvillemoes.dk>,
Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Andrew Morton <akpm@linux-foundation.org>,
linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
Andi Shyti <andi.shyti@linux.intel.com>,
David Laight <David.Laight@aculab.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Jani Nikula <jani.nikula@intel.com>
Subject: Re: [PATCH v6 2/7] bits: introduce fixed-type genmasks
Date: Fri, 7 Mar 2025 19:46:28 +0200 [thread overview]
Message-ID: <Z8sw9P5__EAW8RQh@smile.fi.intel.com> (raw)
In-Reply-To: <20250308-fixed-type-genmasks-v6-2-f59315e73c29@wanadoo.fr>
On Sat, Mar 08, 2025 at 01:48:49AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Yury Norov <yury.norov@gmail.com>
>
> Add GENMASK_TYPE() which generalizes __GENMASK() to support different
> types, and implement fixed-types versions of GENMASK() based on it.
> The fixed-type version allows more strict checks to the min/max values
> accepted, which is useful for defining registers like implemented by
> i915 and xe drivers with their REG_GENMASK*() macros.
>
> The strict checks rely on shift-count-overflow compiler check to fail
> the build if a number outside of the range allowed is passed.
> Example:
>
> #define FOO_MASK GENMASK_U32(33, 4)
>
> will generate a warning like:
>
> include/linux/bits.h:51:27: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 51 | type_max(t) >> (BITS_PER_TYPE(t) - 1 - (h)))))
> | ^~
...
> /*
> * Missing asm support
> *
> + * GENMASK_U*() depends on BITS_PER_TYPE() which relies on sizeof(),
s/depends/depend/ (we are already referring to a plural)
> + * something not available in asm. Nethertheless, fixed width integers
> + * is a C concept. Assembly code can rely on the long and long long
> + * versions instead.
> */
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2025-03-07 17:46 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-07 16:48 [PATCH v6 0/7] bits: Fixed-type GENMASK_U*() and BIT_U*() Vincent Mailhol via B4 Relay
2025-03-07 16:48 ` [PATCH v6 1/7] bits: split the definition of the asm and non-asm GENMASK() Vincent Mailhol via B4 Relay
2025-03-07 17:42 ` Andy Shevchenko
2025-03-08 9:10 ` Vincent Mailhol
2025-03-18 16:06 ` Yury Norov
2025-03-18 16:14 ` Vincent Mailhol
2025-03-07 16:48 ` [PATCH v6 2/7] bits: introduce fixed-type genmasks Vincent Mailhol via B4 Relay
2025-03-07 17:46 ` Andy Shevchenko [this message]
2025-03-18 16:45 ` Yury Norov
2025-03-19 5:39 ` Vincent Mailhol
2025-03-19 13:24 ` Yury Norov
2025-03-07 16:48 ` [PATCH v6 3/7] bits: introduce fixed-type BIT_U*() Vincent Mailhol via B4 Relay
2025-03-07 17:48 ` Andy Shevchenko
2025-03-07 17:49 ` Andy Shevchenko
2025-03-08 9:28 ` Vincent Mailhol
2025-03-07 16:48 ` [PATCH v6 4/7] drm/i915: Convert REG_GENMASK*() to fixed-width GENMASK_U*() Vincent Mailhol via B4 Relay
2025-03-07 17:54 ` Andy Shevchenko
2025-03-08 10:36 ` Vincent Mailhol
2025-03-18 17:16 ` Yury Norov
2025-03-18 22:32 ` Jani Nikula
2025-03-19 4:37 ` Vincent Mailhol
2025-03-19 13:25 ` Yury Norov
2025-03-07 16:48 ` [PATCH v6 5/7] test_bits: add tests for __GENMASK() and __GENMASK_ULL() Vincent Mailhol via B4 Relay
2025-03-07 16:48 ` [PATCH v6 6/7] test_bits: add tests for GENMASK_U*() Vincent Mailhol via B4 Relay
2025-03-07 16:48 ` [PATCH v6 7/7] test_bits: add tests for BIT_U*() Vincent Mailhol via B4 Relay
2025-03-07 17:18 ` [PATCH v6 0/7] bits: Fixed-type GENMASK_U*() and BIT_U*() Yury Norov
2025-03-07 17:43 ` Andy Shevchenko
2025-03-07 17:48 ` Yury Norov
2025-03-07 17:50 ` Andy Shevchenko
2025-03-08 10:40 ` Vincent Mailhol
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