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X-CSE-ConnectionGUID: bfKLxg8QQmenBd1A3toSlg== X-CSE-MsgGUID: WLAO/Ol7TJ+xr/dX8J0O8w== X-IronPort-AV: E=McAfee;i="6700,10204,11365"; a="42654705" X-IronPort-AV: E=Sophos;i="6.14,229,1736841600"; d="scan'208";a="42654705" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 09:46:36 -0800 X-CSE-ConnectionGUID: XTD0cHeZTJC+I1xi0s3rKQ== X-CSE-MsgGUID: 6UglvJRnSIK3DOS2W2uNSQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="156600797" Received: from smile.fi.intel.com ([10.237.72.58]) by orviesa001.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 09:46:32 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.98) (envelope-from ) id 1tqbmG-00000000TXX-1xys; Fri, 07 Mar 2025 19:46:28 +0200 Date: Fri, 7 Mar 2025 19:46:28 +0200 From: Andy Shevchenko To: mailhol.vincent@wanadoo.fr Cc: Yury Norov , Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton , linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Dmitry Baryshkov , Jani Nikula Subject: Re: [PATCH v6 2/7] bits: introduce fixed-type genmasks Message-ID: References: <20250308-fixed-type-genmasks-v6-0-f59315e73c29@wanadoo.fr> <20250308-fixed-type-genmasks-v6-2-f59315e73c29@wanadoo.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250308-fixed-type-genmasks-v6-2-f59315e73c29@wanadoo.fr> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Sat, Mar 08, 2025 at 01:48:49AM +0900, Vincent Mailhol via B4 Relay wrote: > From: Yury Norov > > Add GENMASK_TYPE() which generalizes __GENMASK() to support different > types, and implement fixed-types versions of GENMASK() based on it. > The fixed-type version allows more strict checks to the min/max values > accepted, which is useful for defining registers like implemented by > i915 and xe drivers with their REG_GENMASK*() macros. > > The strict checks rely on shift-count-overflow compiler check to fail > the build if a number outside of the range allowed is passed. > Example: > > #define FOO_MASK GENMASK_U32(33, 4) > > will generate a warning like: > > include/linux/bits.h:51:27: error: right shift count >= width of type [-Werror=shift-count-overflow] > 51 | type_max(t) >> (BITS_PER_TYPE(t) - 1 - (h))))) > | ^~ ... > /* > * Missing asm support > * > + * GENMASK_U*() depends on BITS_PER_TYPE() which relies on sizeof(), s/depends/depend/ (we are already referring to a plural) > + * something not available in asm. Nethertheless, fixed width integers > + * is a C concept. Assembly code can rely on the long and long long > + * versions instead. > */ -- With Best Regards, Andy Shevchenko