[PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Ingo Molnar]

This series contains Ahmed S. Darwish's splitting up of <asm/cpuid.h>
into <asm/cpuid/types.h> and <asm/cpuid/api.h>, followed by a couple
of cleanups that create a more maintainable base.

Thanks,

	Ingo

================>
Ahmed S. Darwish (1):
  x86/cpuid: Refactor <asm/cpuid.h>

Ingo Molnar (4):
  x86/cpuid: Clean up <asm/cpuid/types.h>
  x86/cpuid: Clean up <asm/cpuid/api.h>
  x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>
  x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

 arch/x86/include/asm/cpuid.h       | 217 +--------------------------------------------------------
 arch/x86/include/asm/cpuid/api.h   | 210 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/x86/include/asm/cpuid/types.h |  32 +++++++++
 3 files changed, 243 insertions(+), 216 deletions(-)
 create mode 100644 arch/x86/include/asm/cpuid/api.h
 create mode 100644 arch/x86/include/asm/cpuid/types.h

-- 
2.45.2

[PATCH 1/5] x86/cpuid: Refactor <asm/cpuid.h>

[Ingo Molnar]

From: "Ahmed S. Darwish" <darwi@linutronix.de>

In preparation for future commits where CPUID headers will be expanded,
refactor the CPUID header <asm/cpuid.h> into:

    asm/cpuid/
    ├── api.h
    └── types.h

Move the CPUID data structures into <asm/cpuid/types.h> and the access
APIs into <asm/cpuid/api.h>.  Let <asm/cpuid.h> be just an include of
<asm/cpuid/api.h> so that existing call sites do not break.

Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317164745.4754-3-darwi@linutronix.de
---
 arch/x86/include/asm/cpuid.h       | 217 +--------------------------------------------------------
 arch/x86/include/asm/cpuid/api.h   | 208 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/x86/include/asm/cpuid/types.h |  29 ++++++++
 3 files changed, 238 insertions(+), 216 deletions(-)

diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h
index a92e4b08820a..d5749b25fa10 100644
--- a/arch/x86/include/asm/cpuid.h
+++ b/arch/x86/include/asm/cpuid.h
@@ -1,223 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-/*
- * CPUID-related helpers/definitions
- */
 
 #ifndef _ASM_X86_CPUID_H
 #define _ASM_X86_CPUID_H
 
-#include <linux/build_bug.h>
-#include <linux/types.h>
-
-#include <asm/string.h>
-
-struct cpuid_regs {
-	u32 eax, ebx, ecx, edx;
-};
-
-enum cpuid_regs_idx {
-	CPUID_EAX = 0,
-	CPUID_EBX,
-	CPUID_ECX,
-	CPUID_EDX,
-};
-
-#define CPUID_LEAF_MWAIT	0x5
-#define CPUID_LEAF_DCA		0x9
-#define CPUID_LEAF_XSTATE	0x0d
-#define CPUID_LEAF_TSC		0x15
-#define CPUID_LEAF_FREQ		0x16
-#define CPUID_LEAF_TILE		0x1d
-
-#ifdef CONFIG_X86_32
-bool have_cpuid_p(void);
-#else
-static inline bool have_cpuid_p(void)
-{
-	return true;
-}
-#endif
-static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
-				unsigned int *ecx, unsigned int *edx)
-{
-	/* ecx is often an input as well as an output. */
-	asm volatile("cpuid"
-	    : "=a" (*eax),
-	      "=b" (*ebx),
-	      "=c" (*ecx),
-	      "=d" (*edx)
-	    : "0" (*eax), "2" (*ecx)
-	    : "memory");
-}
-
-#define native_cpuid_reg(reg)					\
-static inline unsigned int native_cpuid_##reg(unsigned int op)	\
-{								\
-	unsigned int eax = op, ebx, ecx = 0, edx;		\
-								\
-	native_cpuid(&eax, &ebx, &ecx, &edx);			\
-								\
-	return reg;						\
-}
-
-/*
- * Native CPUID functions returning a single datum.
- */
-native_cpuid_reg(eax)
-native_cpuid_reg(ebx)
-native_cpuid_reg(ecx)
-native_cpuid_reg(edx)
-
-#ifdef CONFIG_PARAVIRT_XXL
-#include <asm/paravirt.h>
-#else
-#define __cpuid			native_cpuid
-#endif
-
-/*
- * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
- * resulting in stale register contents being returned.
- */
-static inline void cpuid(unsigned int op,
-			 unsigned int *eax, unsigned int *ebx,
-			 unsigned int *ecx, unsigned int *edx)
-{
-	*eax = op;
-	*ecx = 0;
-	__cpuid(eax, ebx, ecx, edx);
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-static inline void cpuid_count(unsigned int op, int count,
-			       unsigned int *eax, unsigned int *ebx,
-			       unsigned int *ecx, unsigned int *edx)
-{
-	*eax = op;
-	*ecx = count;
-	__cpuid(eax, ebx, ecx, edx);
-}
-
-/*
- * CPUID functions returning a single datum
- */
-static inline unsigned int cpuid_eax(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return eax;
-}
-
-static inline unsigned int cpuid_ebx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return ebx;
-}
-
-static inline unsigned int cpuid_ecx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return ecx;
-}
-
-static inline unsigned int cpuid_edx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return edx;
-}
-
-static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
-{
-	regs[CPUID_EAX] = leaf;
-	regs[CPUID_ECX] = subleaf;
-	__cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX);
-}
-
-#define cpuid_subleaf(leaf, subleaf, regs) {		\
-	static_assert(sizeof(*(regs)) == 16);		\
-	__cpuid_read(leaf, subleaf, (u32 *)(regs));	\
-}
-
-#define cpuid_leaf(leaf, regs) {			\
-	static_assert(sizeof(*(regs)) == 16);		\
-	__cpuid_read(leaf, 0, (u32 *)(regs));		\
-}
-
-static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
-				    enum cpuid_regs_idx regidx, u32 *reg)
-{
-	u32 regs[4];
-
-	__cpuid_read(leaf, subleaf, regs);
-	*reg = regs[regidx];
-}
-
-#define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) {		\
-	static_assert(sizeof(*(reg)) == 4);			\
-	__cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg));	\
-}
-
-#define cpuid_leaf_reg(leaf, regidx, reg) {			\
-	static_assert(sizeof(*(reg)) == 4);			\
-	__cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg));	\
-}
-
-static __always_inline bool cpuid_function_is_indexed(u32 function)
-{
-	switch (function) {
-	case 4:
-	case 7:
-	case 0xb:
-	case 0xd:
-	case 0xf:
-	case 0x10:
-	case 0x12:
-	case 0x14:
-	case 0x17:
-	case 0x18:
-	case 0x1d:
-	case 0x1e:
-	case 0x1f:
-	case 0x24:
-	case 0x8000001d:
-		return true;
-	}
-
-	return false;
-}
-
-#define for_each_possible_hypervisor_cpuid_base(function) \
-	for (function = 0x40000000; function < 0x40010000; function += 0x100)
-
-static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
-{
-	uint32_t base, eax, signature[3];
-
-	for_each_possible_hypervisor_cpuid_base(base) {
-		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
-
-		/*
-		 * This must not compile to "call memcmp" because it's called
-		 * from PVH early boot code before instrumentation is set up
-		 * and memcmp() itself may be instrumented.
-		 */
-		if (!__builtin_memcmp(sig, signature, 12) &&
-		    (leaves == 0 || ((eax - base) >= leaves)))
-			return base;
-	}
-
-	return 0;
-}
+#include <asm/cpuid/api.h>
 
 #endif /* _ASM_X86_CPUID_H */
diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
new file mode 100644
index 000000000000..4d1da9cc8b6f
--- /dev/null
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _ASM_X86_CPUID_API_H
+#define _ASM_X86_CPUID_API_H
+
+#include <linux/build_bug.h>
+#include <linux/types.h>
+
+#include <asm/cpuid/types.h>
+#include <asm/string.h>
+
+/*
+ * Raw CPUID accessors
+ */
+
+#ifdef CONFIG_X86_32
+bool have_cpuid_p(void);
+#else
+static inline bool have_cpuid_p(void)
+{
+	return true;
+}
+#endif
+static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
+				unsigned int *ecx, unsigned int *edx)
+{
+	/* ecx is often an input as well as an output. */
+	asm volatile("cpuid"
+	    : "=a" (*eax),
+	      "=b" (*ebx),
+	      "=c" (*ecx),
+	      "=d" (*edx)
+	    : "0" (*eax), "2" (*ecx)
+	    : "memory");
+}
+
+#define native_cpuid_reg(reg)					\
+static inline unsigned int native_cpuid_##reg(unsigned int op)	\
+{								\
+	unsigned int eax = op, ebx, ecx = 0, edx;		\
+								\
+	native_cpuid(&eax, &ebx, &ecx, &edx);			\
+								\
+	return reg;						\
+}
+
+/*
+ * Native CPUID functions returning a single datum.
+ */
+native_cpuid_reg(eax)
+native_cpuid_reg(ebx)
+native_cpuid_reg(ecx)
+native_cpuid_reg(edx)
+
+#ifdef CONFIG_PARAVIRT_XXL
+#include <asm/paravirt.h>
+#else
+#define __cpuid			native_cpuid
+#endif
+
+/*
+ * Generic CPUID function
+ * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
+ * resulting in stale register contents being returned.
+ */
+static inline void cpuid(unsigned int op,
+			 unsigned int *eax, unsigned int *ebx,
+			 unsigned int *ecx, unsigned int *edx)
+{
+	*eax = op;
+	*ecx = 0;
+	__cpuid(eax, ebx, ecx, edx);
+}
+
+/* Some CPUID calls want 'count' to be placed in ecx */
+static inline void cpuid_count(unsigned int op, int count,
+			       unsigned int *eax, unsigned int *ebx,
+			       unsigned int *ecx, unsigned int *edx)
+{
+	*eax = op;
+	*ecx = count;
+	__cpuid(eax, ebx, ecx, edx);
+}
+
+/*
+ * CPUID functions returning a single datum
+ */
+
+static inline unsigned int cpuid_eax(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return eax;
+}
+
+static inline unsigned int cpuid_ebx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return ebx;
+}
+
+static inline unsigned int cpuid_ecx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return ecx;
+}
+
+static inline unsigned int cpuid_edx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return edx;
+}
+
+static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
+{
+	regs[CPUID_EAX] = leaf;
+	regs[CPUID_ECX] = subleaf;
+	__cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX);
+}
+
+#define cpuid_subleaf(leaf, subleaf, regs) {		\
+	static_assert(sizeof(*(regs)) == 16);		\
+	__cpuid_read(leaf, subleaf, (u32 *)(regs));	\
+}
+
+#define cpuid_leaf(leaf, regs) {			\
+	static_assert(sizeof(*(regs)) == 16);		\
+	__cpuid_read(leaf, 0, (u32 *)(regs));		\
+}
+
+static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
+				    enum cpuid_regs_idx regidx, u32 *reg)
+{
+	u32 regs[4];
+
+	__cpuid_read(leaf, subleaf, regs);
+	*reg = regs[regidx];
+}
+
+#define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) {		\
+	static_assert(sizeof(*(reg)) == 4);			\
+	__cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg));	\
+}
+
+#define cpuid_leaf_reg(leaf, regidx, reg) {			\
+	static_assert(sizeof(*(reg)) == 4);			\
+	__cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg));	\
+}
+
+static __always_inline bool cpuid_function_is_indexed(u32 function)
+{
+	switch (function) {
+	case 4:
+	case 7:
+	case 0xb:
+	case 0xd:
+	case 0xf:
+	case 0x10:
+	case 0x12:
+	case 0x14:
+	case 0x17:
+	case 0x18:
+	case 0x1d:
+	case 0x1e:
+	case 0x1f:
+	case 0x24:
+	case 0x8000001d:
+		return true;
+	}
+
+	return false;
+}
+
+#define for_each_possible_hypervisor_cpuid_base(function) \
+	for (function = 0x40000000; function < 0x40010000; function += 0x100)
+
+static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
+{
+	uint32_t base, eax, signature[3];
+
+	for_each_possible_hypervisor_cpuid_base(base) {
+		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
+
+		/*
+		 * This must not compile to "call memcmp" because it's called
+		 * from PVH early boot code before instrumentation is set up
+		 * and memcmp() itself may be instrumented.
+		 */
+		if (!__builtin_memcmp(sig, signature, 12) &&
+		    (leaves == 0 || ((eax - base) >= leaves)))
+			return base;
+	}
+
+	return 0;
+}
+
+#endif /* _ASM_X86_CPUID_API_H */
diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
new file mode 100644
index 000000000000..724002aaff4d
--- /dev/null
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_CPUID_TYPES_H
+#define _ASM_X86_CPUID_TYPES_H
+
+#include <linux/types.h>
+
+/*
+ * Types for raw CPUID access
+ */
+
+struct cpuid_regs {
+	u32 eax, ebx, ecx, edx;
+};
+
+enum cpuid_regs_idx {
+	CPUID_EAX = 0,
+	CPUID_EBX,
+	CPUID_ECX,
+	CPUID_EDX,
+};
+
+#define CPUID_LEAF_MWAIT	0x5
+#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_XSTATE	0x0d
+#define CPUID_LEAF_TSC		0x15
+#define CPUID_LEAF_FREQ		0x16
+#define CPUID_LEAF_TILE		0x1d
+
+#endif /* _ASM_X86_CPUID_TYPES_H */
-- 
2.45.2

[tip: x86/cpu] x86/cpuid: Refactor <asm/cpuid.h>

[tip-bot2 for Ahmed S. Darwish]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     02b63b33dfc9294cfbdef78b99f5e15ef9243e39
Gitweb:        https://git.kernel.org/tip/02b63b33dfc9294cfbdef78b99f5e15ef9243e39
Author:        Ahmed S. Darwish <darwi@linutronix.de>
AuthorDate:    Mon, 17 Mar 2025 23:18:20 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Tue, 18 Mar 2025 09:35:57 +01:00

x86/cpuid: Refactor <asm/cpuid.h>

In preparation for future commits where CPUID headers will be expanded,
refactor the CPUID header <asm/cpuid.h> into:

    asm/cpuid/
    ├── api.h
    └── types.h

Move the CPUID data structures into <asm/cpuid/types.h> and the access
APIs into <asm/cpuid/api.h>.  Let <asm/cpuid.h> be just an include of
<asm/cpuid/api.h> so that existing call sites do not break.

Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-2-mingo@kernel.org
---
 arch/x86/include/asm/cpuid.h       | 217 +----------------------------
 arch/x86/include/asm/cpuid/api.h   | 208 +++++++++++++++++++++++++++-
 arch/x86/include/asm/cpuid/types.h |  29 ++++-
 3 files changed, 238 insertions(+), 216 deletions(-)
 create mode 100644 arch/x86/include/asm/cpuid/api.h
 create mode 100644 arch/x86/include/asm/cpuid/types.h

diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h
index a92e4b0..d5749b2 100644
--- a/arch/x86/include/asm/cpuid.h
+++ b/arch/x86/include/asm/cpuid.h
@@ -1,223 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-/*
- * CPUID-related helpers/definitions
- */
 
 #ifndef _ASM_X86_CPUID_H
 #define _ASM_X86_CPUID_H
 
-#include <linux/build_bug.h>
-#include <linux/types.h>
-
-#include <asm/string.h>
-
-struct cpuid_regs {
-	u32 eax, ebx, ecx, edx;
-};
-
-enum cpuid_regs_idx {
-	CPUID_EAX = 0,
-	CPUID_EBX,
-	CPUID_ECX,
-	CPUID_EDX,
-};
-
-#define CPUID_LEAF_MWAIT	0x5
-#define CPUID_LEAF_DCA		0x9
-#define CPUID_LEAF_XSTATE	0x0d
-#define CPUID_LEAF_TSC		0x15
-#define CPUID_LEAF_FREQ		0x16
-#define CPUID_LEAF_TILE		0x1d
-
-#ifdef CONFIG_X86_32
-bool have_cpuid_p(void);
-#else
-static inline bool have_cpuid_p(void)
-{
-	return true;
-}
-#endif
-static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
-				unsigned int *ecx, unsigned int *edx)
-{
-	/* ecx is often an input as well as an output. */
-	asm volatile("cpuid"
-	    : "=a" (*eax),
-	      "=b" (*ebx),
-	      "=c" (*ecx),
-	      "=d" (*edx)
-	    : "0" (*eax), "2" (*ecx)
-	    : "memory");
-}
-
-#define native_cpuid_reg(reg)					\
-static inline unsigned int native_cpuid_##reg(unsigned int op)	\
-{								\
-	unsigned int eax = op, ebx, ecx = 0, edx;		\
-								\
-	native_cpuid(&eax, &ebx, &ecx, &edx);			\
-								\
-	return reg;						\
-}
-
-/*
- * Native CPUID functions returning a single datum.
- */
-native_cpuid_reg(eax)
-native_cpuid_reg(ebx)
-native_cpuid_reg(ecx)
-native_cpuid_reg(edx)
-
-#ifdef CONFIG_PARAVIRT_XXL
-#include <asm/paravirt.h>
-#else
-#define __cpuid			native_cpuid
-#endif
-
-/*
- * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
- * resulting in stale register contents being returned.
- */
-static inline void cpuid(unsigned int op,
-			 unsigned int *eax, unsigned int *ebx,
-			 unsigned int *ecx, unsigned int *edx)
-{
-	*eax = op;
-	*ecx = 0;
-	__cpuid(eax, ebx, ecx, edx);
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-static inline void cpuid_count(unsigned int op, int count,
-			       unsigned int *eax, unsigned int *ebx,
-			       unsigned int *ecx, unsigned int *edx)
-{
-	*eax = op;
-	*ecx = count;
-	__cpuid(eax, ebx, ecx, edx);
-}
-
-/*
- * CPUID functions returning a single datum
- */
-static inline unsigned int cpuid_eax(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return eax;
-}
-
-static inline unsigned int cpuid_ebx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return ebx;
-}
-
-static inline unsigned int cpuid_ecx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return ecx;
-}
-
-static inline unsigned int cpuid_edx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return edx;
-}
-
-static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
-{
-	regs[CPUID_EAX] = leaf;
-	regs[CPUID_ECX] = subleaf;
-	__cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX);
-}
-
-#define cpuid_subleaf(leaf, subleaf, regs) {		\
-	static_assert(sizeof(*(regs)) == 16);		\
-	__cpuid_read(leaf, subleaf, (u32 *)(regs));	\
-}
-
-#define cpuid_leaf(leaf, regs) {			\
-	static_assert(sizeof(*(regs)) == 16);		\
-	__cpuid_read(leaf, 0, (u32 *)(regs));		\
-}
-
-static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
-				    enum cpuid_regs_idx regidx, u32 *reg)
-{
-	u32 regs[4];
-
-	__cpuid_read(leaf, subleaf, regs);
-	*reg = regs[regidx];
-}
-
-#define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) {		\
-	static_assert(sizeof(*(reg)) == 4);			\
-	__cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg));	\
-}
-
-#define cpuid_leaf_reg(leaf, regidx, reg) {			\
-	static_assert(sizeof(*(reg)) == 4);			\
-	__cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg));	\
-}
-
-static __always_inline bool cpuid_function_is_indexed(u32 function)
-{
-	switch (function) {
-	case 4:
-	case 7:
-	case 0xb:
-	case 0xd:
-	case 0xf:
-	case 0x10:
-	case 0x12:
-	case 0x14:
-	case 0x17:
-	case 0x18:
-	case 0x1d:
-	case 0x1e:
-	case 0x1f:
-	case 0x24:
-	case 0x8000001d:
-		return true;
-	}
-
-	return false;
-}
-
-#define for_each_possible_hypervisor_cpuid_base(function) \
-	for (function = 0x40000000; function < 0x40010000; function += 0x100)
-
-static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
-{
-	uint32_t base, eax, signature[3];
-
-	for_each_possible_hypervisor_cpuid_base(base) {
-		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
-
-		/*
-		 * This must not compile to "call memcmp" because it's called
-		 * from PVH early boot code before instrumentation is set up
-		 * and memcmp() itself may be instrumented.
-		 */
-		if (!__builtin_memcmp(sig, signature, 12) &&
-		    (leaves == 0 || ((eax - base) >= leaves)))
-			return base;
-	}
-
-	return 0;
-}
+#include <asm/cpuid/api.h>
 
 #endif /* _ASM_X86_CPUID_H */
diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
new file mode 100644
index 0000000..4d1da9c
--- /dev/null
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _ASM_X86_CPUID_API_H
+#define _ASM_X86_CPUID_API_H
+
+#include <linux/build_bug.h>
+#include <linux/types.h>
+
+#include <asm/cpuid/types.h>
+#include <asm/string.h>
+
+/*
+ * Raw CPUID accessors
+ */
+
+#ifdef CONFIG_X86_32
+bool have_cpuid_p(void);
+#else
+static inline bool have_cpuid_p(void)
+{
+	return true;
+}
+#endif
+static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
+				unsigned int *ecx, unsigned int *edx)
+{
+	/* ecx is often an input as well as an output. */
+	asm volatile("cpuid"
+	    : "=a" (*eax),
+	      "=b" (*ebx),
+	      "=c" (*ecx),
+	      "=d" (*edx)
+	    : "0" (*eax), "2" (*ecx)
+	    : "memory");
+}
+
+#define native_cpuid_reg(reg)					\
+static inline unsigned int native_cpuid_##reg(unsigned int op)	\
+{								\
+	unsigned int eax = op, ebx, ecx = 0, edx;		\
+								\
+	native_cpuid(&eax, &ebx, &ecx, &edx);			\
+								\
+	return reg;						\
+}
+
+/*
+ * Native CPUID functions returning a single datum.
+ */
+native_cpuid_reg(eax)
+native_cpuid_reg(ebx)
+native_cpuid_reg(ecx)
+native_cpuid_reg(edx)
+
+#ifdef CONFIG_PARAVIRT_XXL
+#include <asm/paravirt.h>
+#else
+#define __cpuid			native_cpuid
+#endif
+
+/*
+ * Generic CPUID function
+ * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
+ * resulting in stale register contents being returned.
+ */
+static inline void cpuid(unsigned int op,
+			 unsigned int *eax, unsigned int *ebx,
+			 unsigned int *ecx, unsigned int *edx)
+{
+	*eax = op;
+	*ecx = 0;
+	__cpuid(eax, ebx, ecx, edx);
+}
+
+/* Some CPUID calls want 'count' to be placed in ecx */
+static inline void cpuid_count(unsigned int op, int count,
+			       unsigned int *eax, unsigned int *ebx,
+			       unsigned int *ecx, unsigned int *edx)
+{
+	*eax = op;
+	*ecx = count;
+	__cpuid(eax, ebx, ecx, edx);
+}
+
+/*
+ * CPUID functions returning a single datum
+ */
+
+static inline unsigned int cpuid_eax(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return eax;
+}
+
+static inline unsigned int cpuid_ebx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return ebx;
+}
+
+static inline unsigned int cpuid_ecx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return ecx;
+}
+
+static inline unsigned int cpuid_edx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return edx;
+}
+
+static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
+{
+	regs[CPUID_EAX] = leaf;
+	regs[CPUID_ECX] = subleaf;
+	__cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX);
+}
+
+#define cpuid_subleaf(leaf, subleaf, regs) {		\
+	static_assert(sizeof(*(regs)) == 16);		\
+	__cpuid_read(leaf, subleaf, (u32 *)(regs));	\
+}
+
+#define cpuid_leaf(leaf, regs) {			\
+	static_assert(sizeof(*(regs)) == 16);		\
+	__cpuid_read(leaf, 0, (u32 *)(regs));		\
+}
+
+static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
+				    enum cpuid_regs_idx regidx, u32 *reg)
+{
+	u32 regs[4];
+
+	__cpuid_read(leaf, subleaf, regs);
+	*reg = regs[regidx];
+}
+
+#define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) {		\
+	static_assert(sizeof(*(reg)) == 4);			\
+	__cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg));	\
+}
+
+#define cpuid_leaf_reg(leaf, regidx, reg) {			\
+	static_assert(sizeof(*(reg)) == 4);			\
+	__cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg));	\
+}
+
+static __always_inline bool cpuid_function_is_indexed(u32 function)
+{
+	switch (function) {
+	case 4:
+	case 7:
+	case 0xb:
+	case 0xd:
+	case 0xf:
+	case 0x10:
+	case 0x12:
+	case 0x14:
+	case 0x17:
+	case 0x18:
+	case 0x1d:
+	case 0x1e:
+	case 0x1f:
+	case 0x24:
+	case 0x8000001d:
+		return true;
+	}
+
+	return false;
+}
+
+#define for_each_possible_hypervisor_cpuid_base(function) \
+	for (function = 0x40000000; function < 0x40010000; function += 0x100)
+
+static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
+{
+	uint32_t base, eax, signature[3];
+
+	for_each_possible_hypervisor_cpuid_base(base) {
+		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
+
+		/*
+		 * This must not compile to "call memcmp" because it's called
+		 * from PVH early boot code before instrumentation is set up
+		 * and memcmp() itself may be instrumented.
+		 */
+		if (!__builtin_memcmp(sig, signature, 12) &&
+		    (leaves == 0 || ((eax - base) >= leaves)))
+			return base;
+	}
+
+	return 0;
+}
+
+#endif /* _ASM_X86_CPUID_API_H */
diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
new file mode 100644
index 0000000..724002a
--- /dev/null
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_CPUID_TYPES_H
+#define _ASM_X86_CPUID_TYPES_H
+
+#include <linux/types.h>
+
+/*
+ * Types for raw CPUID access
+ */
+
+struct cpuid_regs {
+	u32 eax, ebx, ecx, edx;
+};
+
+enum cpuid_regs_idx {
+	CPUID_EAX = 0,
+	CPUID_EBX,
+	CPUID_ECX,
+	CPUID_EDX,
+};
+
+#define CPUID_LEAF_MWAIT	0x5
+#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_XSTATE	0x0d
+#define CPUID_LEAF_TSC		0x15
+#define CPUID_LEAF_FREQ		0x16
+#define CPUID_LEAF_TILE		0x1d
+
+#endif /* _ASM_X86_CPUID_TYPES_H */

[tip: x86/core] x86/cpuid: Refactor <asm/cpuid.h>

[tip-bot2 for Ahmed S. Darwish]

The following commit has been merged into the x86/core branch of tip:

Commit-ID:     adc574269bca8dbde9f8f22841e40d3380241921
Gitweb:        https://git.kernel.org/tip/adc574269bca8dbde9f8f22841e40d3380241921
Author:        Ahmed S. Darwish <darwi@linutronix.de>
AuthorDate:    Mon, 17 Mar 2025 23:18:20 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 19 Mar 2025 11:19:22 +01:00

x86/cpuid: Refactor <asm/cpuid.h>

In preparation for future commits where CPUID headers will be expanded,
refactor the CPUID header <asm/cpuid.h> into:

    asm/cpuid/
    ├── api.h
    └── types.h

Move the CPUID data structures into <asm/cpuid/types.h> and the access
APIs into <asm/cpuid/api.h>.  Let <asm/cpuid.h> be just an include of
<asm/cpuid/api.h> so that existing call sites do not break.

Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-2-mingo@kernel.org
---
 arch/x86/include/asm/cpuid.h       | 217 +----------------------------
 arch/x86/include/asm/cpuid/api.h   | 208 +++++++++++++++++++++++++++-
 arch/x86/include/asm/cpuid/types.h |  29 ++++-
 3 files changed, 238 insertions(+), 216 deletions(-)
 create mode 100644 arch/x86/include/asm/cpuid/api.h
 create mode 100644 arch/x86/include/asm/cpuid/types.h

diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h
index a92e4b0..d5749b2 100644
--- a/arch/x86/include/asm/cpuid.h
+++ b/arch/x86/include/asm/cpuid.h
@@ -1,223 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-/*
- * CPUID-related helpers/definitions
- */
 
 #ifndef _ASM_X86_CPUID_H
 #define _ASM_X86_CPUID_H
 
-#include <linux/build_bug.h>
-#include <linux/types.h>
-
-#include <asm/string.h>
-
-struct cpuid_regs {
-	u32 eax, ebx, ecx, edx;
-};
-
-enum cpuid_regs_idx {
-	CPUID_EAX = 0,
-	CPUID_EBX,
-	CPUID_ECX,
-	CPUID_EDX,
-};
-
-#define CPUID_LEAF_MWAIT	0x5
-#define CPUID_LEAF_DCA		0x9
-#define CPUID_LEAF_XSTATE	0x0d
-#define CPUID_LEAF_TSC		0x15
-#define CPUID_LEAF_FREQ		0x16
-#define CPUID_LEAF_TILE		0x1d
-
-#ifdef CONFIG_X86_32
-bool have_cpuid_p(void);
-#else
-static inline bool have_cpuid_p(void)
-{
-	return true;
-}
-#endif
-static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
-				unsigned int *ecx, unsigned int *edx)
-{
-	/* ecx is often an input as well as an output. */
-	asm volatile("cpuid"
-	    : "=a" (*eax),
-	      "=b" (*ebx),
-	      "=c" (*ecx),
-	      "=d" (*edx)
-	    : "0" (*eax), "2" (*ecx)
-	    : "memory");
-}
-
-#define native_cpuid_reg(reg)					\
-static inline unsigned int native_cpuid_##reg(unsigned int op)	\
-{								\
-	unsigned int eax = op, ebx, ecx = 0, edx;		\
-								\
-	native_cpuid(&eax, &ebx, &ecx, &edx);			\
-								\
-	return reg;						\
-}
-
-/*
- * Native CPUID functions returning a single datum.
- */
-native_cpuid_reg(eax)
-native_cpuid_reg(ebx)
-native_cpuid_reg(ecx)
-native_cpuid_reg(edx)
-
-#ifdef CONFIG_PARAVIRT_XXL
-#include <asm/paravirt.h>
-#else
-#define __cpuid			native_cpuid
-#endif
-
-/*
- * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
- * resulting in stale register contents being returned.
- */
-static inline void cpuid(unsigned int op,
-			 unsigned int *eax, unsigned int *ebx,
-			 unsigned int *ecx, unsigned int *edx)
-{
-	*eax = op;
-	*ecx = 0;
-	__cpuid(eax, ebx, ecx, edx);
-}
-
-/* Some CPUID calls want 'count' to be placed in ecx */
-static inline void cpuid_count(unsigned int op, int count,
-			       unsigned int *eax, unsigned int *ebx,
-			       unsigned int *ecx, unsigned int *edx)
-{
-	*eax = op;
-	*ecx = count;
-	__cpuid(eax, ebx, ecx, edx);
-}
-
-/*
- * CPUID functions returning a single datum
- */
-static inline unsigned int cpuid_eax(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return eax;
-}
-
-static inline unsigned int cpuid_ebx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return ebx;
-}
-
-static inline unsigned int cpuid_ecx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return ecx;
-}
-
-static inline unsigned int cpuid_edx(unsigned int op)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid(op, &eax, &ebx, &ecx, &edx);
-
-	return edx;
-}
-
-static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
-{
-	regs[CPUID_EAX] = leaf;
-	regs[CPUID_ECX] = subleaf;
-	__cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX);
-}
-
-#define cpuid_subleaf(leaf, subleaf, regs) {		\
-	static_assert(sizeof(*(regs)) == 16);		\
-	__cpuid_read(leaf, subleaf, (u32 *)(regs));	\
-}
-
-#define cpuid_leaf(leaf, regs) {			\
-	static_assert(sizeof(*(regs)) == 16);		\
-	__cpuid_read(leaf, 0, (u32 *)(regs));		\
-}
-
-static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
-				    enum cpuid_regs_idx regidx, u32 *reg)
-{
-	u32 regs[4];
-
-	__cpuid_read(leaf, subleaf, regs);
-	*reg = regs[regidx];
-}
-
-#define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) {		\
-	static_assert(sizeof(*(reg)) == 4);			\
-	__cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg));	\
-}
-
-#define cpuid_leaf_reg(leaf, regidx, reg) {			\
-	static_assert(sizeof(*(reg)) == 4);			\
-	__cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg));	\
-}
-
-static __always_inline bool cpuid_function_is_indexed(u32 function)
-{
-	switch (function) {
-	case 4:
-	case 7:
-	case 0xb:
-	case 0xd:
-	case 0xf:
-	case 0x10:
-	case 0x12:
-	case 0x14:
-	case 0x17:
-	case 0x18:
-	case 0x1d:
-	case 0x1e:
-	case 0x1f:
-	case 0x24:
-	case 0x8000001d:
-		return true;
-	}
-
-	return false;
-}
-
-#define for_each_possible_hypervisor_cpuid_base(function) \
-	for (function = 0x40000000; function < 0x40010000; function += 0x100)
-
-static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
-{
-	uint32_t base, eax, signature[3];
-
-	for_each_possible_hypervisor_cpuid_base(base) {
-		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
-
-		/*
-		 * This must not compile to "call memcmp" because it's called
-		 * from PVH early boot code before instrumentation is set up
-		 * and memcmp() itself may be instrumented.
-		 */
-		if (!__builtin_memcmp(sig, signature, 12) &&
-		    (leaves == 0 || ((eax - base) >= leaves)))
-			return base;
-	}
-
-	return 0;
-}
+#include <asm/cpuid/api.h>
 
 #endif /* _ASM_X86_CPUID_H */
diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
new file mode 100644
index 0000000..4d1da9c
--- /dev/null
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _ASM_X86_CPUID_API_H
+#define _ASM_X86_CPUID_API_H
+
+#include <linux/build_bug.h>
+#include <linux/types.h>
+
+#include <asm/cpuid/types.h>
+#include <asm/string.h>
+
+/*
+ * Raw CPUID accessors
+ */
+
+#ifdef CONFIG_X86_32
+bool have_cpuid_p(void);
+#else
+static inline bool have_cpuid_p(void)
+{
+	return true;
+}
+#endif
+static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
+				unsigned int *ecx, unsigned int *edx)
+{
+	/* ecx is often an input as well as an output. */
+	asm volatile("cpuid"
+	    : "=a" (*eax),
+	      "=b" (*ebx),
+	      "=c" (*ecx),
+	      "=d" (*edx)
+	    : "0" (*eax), "2" (*ecx)
+	    : "memory");
+}
+
+#define native_cpuid_reg(reg)					\
+static inline unsigned int native_cpuid_##reg(unsigned int op)	\
+{								\
+	unsigned int eax = op, ebx, ecx = 0, edx;		\
+								\
+	native_cpuid(&eax, &ebx, &ecx, &edx);			\
+								\
+	return reg;						\
+}
+
+/*
+ * Native CPUID functions returning a single datum.
+ */
+native_cpuid_reg(eax)
+native_cpuid_reg(ebx)
+native_cpuid_reg(ecx)
+native_cpuid_reg(edx)
+
+#ifdef CONFIG_PARAVIRT_XXL
+#include <asm/paravirt.h>
+#else
+#define __cpuid			native_cpuid
+#endif
+
+/*
+ * Generic CPUID function
+ * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
+ * resulting in stale register contents being returned.
+ */
+static inline void cpuid(unsigned int op,
+			 unsigned int *eax, unsigned int *ebx,
+			 unsigned int *ecx, unsigned int *edx)
+{
+	*eax = op;
+	*ecx = 0;
+	__cpuid(eax, ebx, ecx, edx);
+}
+
+/* Some CPUID calls want 'count' to be placed in ecx */
+static inline void cpuid_count(unsigned int op, int count,
+			       unsigned int *eax, unsigned int *ebx,
+			       unsigned int *ecx, unsigned int *edx)
+{
+	*eax = op;
+	*ecx = count;
+	__cpuid(eax, ebx, ecx, edx);
+}
+
+/*
+ * CPUID functions returning a single datum
+ */
+
+static inline unsigned int cpuid_eax(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return eax;
+}
+
+static inline unsigned int cpuid_ebx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return ebx;
+}
+
+static inline unsigned int cpuid_ecx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return ecx;
+}
+
+static inline unsigned int cpuid_edx(unsigned int op)
+{
+	unsigned int eax, ebx, ecx, edx;
+
+	cpuid(op, &eax, &ebx, &ecx, &edx);
+
+	return edx;
+}
+
+static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
+{
+	regs[CPUID_EAX] = leaf;
+	regs[CPUID_ECX] = subleaf;
+	__cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX);
+}
+
+#define cpuid_subleaf(leaf, subleaf, regs) {		\
+	static_assert(sizeof(*(regs)) == 16);		\
+	__cpuid_read(leaf, subleaf, (u32 *)(regs));	\
+}
+
+#define cpuid_leaf(leaf, regs) {			\
+	static_assert(sizeof(*(regs)) == 16);		\
+	__cpuid_read(leaf, 0, (u32 *)(regs));		\
+}
+
+static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
+				    enum cpuid_regs_idx regidx, u32 *reg)
+{
+	u32 regs[4];
+
+	__cpuid_read(leaf, subleaf, regs);
+	*reg = regs[regidx];
+}
+
+#define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) {		\
+	static_assert(sizeof(*(reg)) == 4);			\
+	__cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg));	\
+}
+
+#define cpuid_leaf_reg(leaf, regidx, reg) {			\
+	static_assert(sizeof(*(reg)) == 4);			\
+	__cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg));	\
+}
+
+static __always_inline bool cpuid_function_is_indexed(u32 function)
+{
+	switch (function) {
+	case 4:
+	case 7:
+	case 0xb:
+	case 0xd:
+	case 0xf:
+	case 0x10:
+	case 0x12:
+	case 0x14:
+	case 0x17:
+	case 0x18:
+	case 0x1d:
+	case 0x1e:
+	case 0x1f:
+	case 0x24:
+	case 0x8000001d:
+		return true;
+	}
+
+	return false;
+}
+
+#define for_each_possible_hypervisor_cpuid_base(function) \
+	for (function = 0x40000000; function < 0x40010000; function += 0x100)
+
+static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
+{
+	uint32_t base, eax, signature[3];
+
+	for_each_possible_hypervisor_cpuid_base(base) {
+		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
+
+		/*
+		 * This must not compile to "call memcmp" because it's called
+		 * from PVH early boot code before instrumentation is set up
+		 * and memcmp() itself may be instrumented.
+		 */
+		if (!__builtin_memcmp(sig, signature, 12) &&
+		    (leaves == 0 || ((eax - base) >= leaves)))
+			return base;
+	}
+
+	return 0;
+}
+
+#endif /* _ASM_X86_CPUID_API_H */
diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
new file mode 100644
index 0000000..724002a
--- /dev/null
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_CPUID_TYPES_H
+#define _ASM_X86_CPUID_TYPES_H
+
+#include <linux/types.h>
+
+/*
+ * Types for raw CPUID access
+ */
+
+struct cpuid_regs {
+	u32 eax, ebx, ecx, edx;
+};
+
+enum cpuid_regs_idx {
+	CPUID_EAX = 0,
+	CPUID_EBX,
+	CPUID_ECX,
+	CPUID_EDX,
+};
+
+#define CPUID_LEAF_MWAIT	0x5
+#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_XSTATE	0x0d
+#define CPUID_LEAF_TSC		0x15
+#define CPUID_LEAF_FREQ		0x16
+#define CPUID_LEAF_TILE		0x1d
+
+#endif /* _ASM_X86_CPUID_TYPES_H */

[PATCH 2/5] x86/cpuid: Clean up <asm/cpuid/types.h>

[Ingo Molnar]

 - We have 0x0d, 0x9 and 0x1d as literals for the CPUID_LEAF definitions,
   pick a single, consistent style of 0xZZ literals.

 - Likewise, harmonize the style of the 'struct cpuid_regs' list of
   registers with that of 'enum cpuid_regs_idx'. Because while computers
   don't care about unnecessary visual noise, humans do.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Ahmed S. Darwish <darwi@linutronix.de>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317164745.4754-3-darwi@linutronix.de
---
 arch/x86/include/asm/cpuid/types.h | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
index 724002aaff4d..8582e27e836d 100644
--- a/arch/x86/include/asm/cpuid/types.h
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -5,11 +5,14 @@
 #include <linux/types.h>
 
 /*
- * Types for raw CPUID access
+ * Types for raw CPUID access:
  */
 
 struct cpuid_regs {
-	u32 eax, ebx, ecx, edx;
+	u32 eax;
+	u32 ebx;
+	u32 ecx;
+	u32 edx;
 };
 
 enum cpuid_regs_idx {
@@ -19,8 +22,8 @@ enum cpuid_regs_idx {
 	CPUID_EDX,
 };
 
-#define CPUID_LEAF_MWAIT	0x5
-#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_MWAIT	0x05
+#define CPUID_LEAF_DCA		0x09
 #define CPUID_LEAF_XSTATE	0x0d
 #define CPUID_LEAF_TSC		0x15
 #define CPUID_LEAF_FREQ		0x16
-- 
2.45.2

[tip: x86/cpu] x86/cpuid: Clean up <asm/cpuid/types.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     67a7ae050e7c2e9f9c5d1099909f7a1d45c3181e
Gitweb:        https://git.kernel.org/tip/67a7ae050e7c2e9f9c5d1099909f7a1d45c3181e
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:21 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Tue, 18 Mar 2025 09:35:57 +01:00

x86/cpuid: Clean up <asm/cpuid/types.h>

 - We have 0x0d, 0x9 and 0x1d as literals for the CPUID_LEAF definitions,
   pick a single, consistent style of 0xZZ literals.

 - Likewise, harmonize the style of the 'struct cpuid_regs' list of
   registers with that of 'enum cpuid_regs_idx'. Because while computers
   don't care about unnecessary visual noise, humans do.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-3-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/types.h | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
index 724002a..8582e27 100644
--- a/arch/x86/include/asm/cpuid/types.h
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -5,11 +5,14 @@
 #include <linux/types.h>
 
 /*
- * Types for raw CPUID access
+ * Types for raw CPUID access:
  */
 
 struct cpuid_regs {
-	u32 eax, ebx, ecx, edx;
+	u32 eax;
+	u32 ebx;
+	u32 ecx;
+	u32 edx;
 };
 
 enum cpuid_regs_idx {
@@ -19,8 +22,8 @@ enum cpuid_regs_idx {
 	CPUID_EDX,
 };
 
-#define CPUID_LEAF_MWAIT	0x5
-#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_MWAIT	0x05
+#define CPUID_LEAF_DCA		0x09
 #define CPUID_LEAF_XSTATE	0x0d
 #define CPUID_LEAF_TSC		0x15
 #define CPUID_LEAF_FREQ		0x16

[tip: x86/core] x86/cpuid: Clean up <asm/cpuid/types.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/core branch of tip:

Commit-ID:     04a1007004da767db5ad8ba01809a5052c3a7909
Gitweb:        https://git.kernel.org/tip/04a1007004da767db5ad8ba01809a5052c3a7909
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:21 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 19 Mar 2025 11:19:23 +01:00

x86/cpuid: Clean up <asm/cpuid/types.h>

 - We have 0x0d, 0x9 and 0x1d as literals for the CPUID_LEAF definitions,
   pick a single, consistent style of 0xZZ literals.

 - Likewise, harmonize the style of the 'struct cpuid_regs' list of
   registers with that of 'enum cpuid_regs_idx'. Because while computers
   don't care about unnecessary visual noise, humans do.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-3-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/types.h | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
index 724002a..8582e27 100644
--- a/arch/x86/include/asm/cpuid/types.h
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -5,11 +5,14 @@
 #include <linux/types.h>
 
 /*
- * Types for raw CPUID access
+ * Types for raw CPUID access:
  */
 
 struct cpuid_regs {
-	u32 eax, ebx, ecx, edx;
+	u32 eax;
+	u32 ebx;
+	u32 ecx;
+	u32 edx;
 };
 
 enum cpuid_regs_idx {
@@ -19,8 +22,8 @@ enum cpuid_regs_idx {
 	CPUID_EDX,
 };
 
-#define CPUID_LEAF_MWAIT	0x5
-#define CPUID_LEAF_DCA		0x9
+#define CPUID_LEAF_MWAIT	0x05
+#define CPUID_LEAF_DCA		0x09
 #define CPUID_LEAF_XSTATE	0x0d
 #define CPUID_LEAF_TSC		0x15
 #define CPUID_LEAF_FREQ		0x16

[PATCH 3/5] x86/cpuid: Clean up <asm/cpuid/api.h>

[Ingo Molnar]

 - Include <asm/cpuid/types.h> first, as is customary. This also has
   the side effect of build-testing the header dependency assumptions
   in the types header.

 - No newline necessary after the SPDX line

 - Newline necessary after inline function definitions

 - Rename native_cpuid_reg() to NATIVE_CPUID_REG(): it's a CPP macro,
   whose name we capitalize in such cases.

 - Prettify the CONFIG_PARAVIRT_XXL inclusion block a bit

 - Standardize register references in comments to EAX/EBX/ECX/etc.,
   from the hodgepodge of references.

 - s/cpus/CPUs because why add noise to common acronyms?

 - Use u32 instead of uint32_t in hypervisor_cpuid_base(). Yes, I realize
   uint32_t is used in Xen code, but this is a core x86 architecture header
   and we should standardize on the type that is being used overwhelmingly
   in x86 architecture code. The two types are the same so there should be
   no build warnings.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Ahmed S. Darwish <darwi@linutronix.de>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317164745.4754-3-darwi@linutronix.de
---
 arch/x86/include/asm/cpuid/api.h | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index 4d1da9cc8b6f..f26926ba5289 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -1,16 +1,16 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-
 #ifndef _ASM_X86_CPUID_API_H
 #define _ASM_X86_CPUID_API_H
 
+#include <asm/cpuid/types.h>
+
 #include <linux/build_bug.h>
 #include <linux/types.h>
 
-#include <asm/cpuid/types.h>
 #include <asm/string.h>
 
 /*
- * Raw CPUID accessors
+ * Raw CPUID accessors:
  */
 
 #ifdef CONFIG_X86_32
@@ -21,6 +21,7 @@ static inline bool have_cpuid_p(void)
 	return true;
 }
 #endif
+
 static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 				unsigned int *ecx, unsigned int *edx)
 {
@@ -34,7 +35,7 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 	    : "memory");
 }
 
-#define native_cpuid_reg(reg)					\
+#define NATIVE_CPUID_REG(reg)					\
 static inline unsigned int native_cpuid_##reg(unsigned int op)	\
 {								\
 	unsigned int eax = op, ebx, ecx = 0, edx;		\
@@ -45,22 +46,23 @@ static inline unsigned int native_cpuid_##reg(unsigned int op)	\
 }
 
 /*
- * Native CPUID functions returning a single datum.
+ * Native CPUID functions returning a single datum:
  */
-native_cpuid_reg(eax)
-native_cpuid_reg(ebx)
-native_cpuid_reg(ecx)
-native_cpuid_reg(edx)
+NATIVE_CPUID_REG(eax)
+NATIVE_CPUID_REG(ebx)
+NATIVE_CPUID_REG(ecx)
+NATIVE_CPUID_REG(edx)
 
 #ifdef CONFIG_PARAVIRT_XXL
-#include <asm/paravirt.h>
+# include <asm/paravirt.h>
 #else
-#define __cpuid			native_cpuid
+# define __cpuid native_cpuid
 #endif
 
 /*
  * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
+ *
+ * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX
  * resulting in stale register contents being returned.
  */
 static inline void cpuid(unsigned int op,
@@ -72,7 +74,7 @@ static inline void cpuid(unsigned int op,
 	__cpuid(eax, ebx, ecx, edx);
 }
 
-/* Some CPUID calls want 'count' to be placed in ecx */
+/* Some CPUID calls want 'count' to be placed in ECX */
 static inline void cpuid_count(unsigned int op, int count,
 			       unsigned int *eax, unsigned int *ebx,
 			       unsigned int *ecx, unsigned int *edx)
@@ -83,7 +85,7 @@ static inline void cpuid_count(unsigned int op, int count,
 }
 
 /*
- * CPUID functions returning a single datum
+ * CPUID functions returning a single datum:
  */
 
 static inline unsigned int cpuid_eax(unsigned int op)
-- 
2.45.2

[tip: x86/cpu] x86/cpuid: Clean up <asm/cpuid/api.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     f2f828b547abb37fe60bc3419414c50327b7acff
Gitweb:        https://git.kernel.org/tip/f2f828b547abb37fe60bc3419414c50327b7acff
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:22 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Tue, 18 Mar 2025 09:35:58 +01:00

x86/cpuid: Clean up <asm/cpuid/api.h>

 - Include <asm/cpuid/types.h> first, as is customary. This also has
   the side effect of build-testing the header dependency assumptions
   in the types header.

 - No newline necessary after the SPDX line

 - Newline necessary after inline function definitions

 - Rename native_cpuid_reg() to NATIVE_CPUID_REG(): it's a CPP macro,
   whose name we capitalize in such cases.

 - Prettify the CONFIG_PARAVIRT_XXL inclusion block a bit

 - Standardize register references in comments to EAX/EBX/ECX/etc.,
   from the hodgepodge of references.

 - s/cpus/CPUs because why add noise to common acronyms?

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-4-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/api.h | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index 4d1da9c..f26926b 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -1,16 +1,16 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-
 #ifndef _ASM_X86_CPUID_API_H
 #define _ASM_X86_CPUID_API_H
 
+#include <asm/cpuid/types.h>
+
 #include <linux/build_bug.h>
 #include <linux/types.h>
 
-#include <asm/cpuid/types.h>
 #include <asm/string.h>
 
 /*
- * Raw CPUID accessors
+ * Raw CPUID accessors:
  */
 
 #ifdef CONFIG_X86_32
@@ -21,6 +21,7 @@ static inline bool have_cpuid_p(void)
 	return true;
 }
 #endif
+
 static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 				unsigned int *ecx, unsigned int *edx)
 {
@@ -34,7 +35,7 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 	    : "memory");
 }
 
-#define native_cpuid_reg(reg)					\
+#define NATIVE_CPUID_REG(reg)					\
 static inline unsigned int native_cpuid_##reg(unsigned int op)	\
 {								\
 	unsigned int eax = op, ebx, ecx = 0, edx;		\
@@ -45,22 +46,23 @@ static inline unsigned int native_cpuid_##reg(unsigned int op)	\
 }
 
 /*
- * Native CPUID functions returning a single datum.
+ * Native CPUID functions returning a single datum:
  */
-native_cpuid_reg(eax)
-native_cpuid_reg(ebx)
-native_cpuid_reg(ecx)
-native_cpuid_reg(edx)
+NATIVE_CPUID_REG(eax)
+NATIVE_CPUID_REG(ebx)
+NATIVE_CPUID_REG(ecx)
+NATIVE_CPUID_REG(edx)
 
 #ifdef CONFIG_PARAVIRT_XXL
-#include <asm/paravirt.h>
+# include <asm/paravirt.h>
 #else
-#define __cpuid			native_cpuid
+# define __cpuid native_cpuid
 #endif
 
 /*
  * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
+ *
+ * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX
  * resulting in stale register contents being returned.
  */
 static inline void cpuid(unsigned int op,
@@ -72,7 +74,7 @@ static inline void cpuid(unsigned int op,
 	__cpuid(eax, ebx, ecx, edx);
 }
 
-/* Some CPUID calls want 'count' to be placed in ecx */
+/* Some CPUID calls want 'count' to be placed in ECX */
 static inline void cpuid_count(unsigned int op, int count,
 			       unsigned int *eax, unsigned int *ebx,
 			       unsigned int *ecx, unsigned int *edx)
@@ -83,7 +85,7 @@ static inline void cpuid_count(unsigned int op, int count,
 }
 
 /*
- * CPUID functions returning a single datum
+ * CPUID functions returning a single datum:
  */
 
 static inline unsigned int cpuid_eax(unsigned int op)

[tip: x86/core] x86/cpuid: Clean up <asm/cpuid/api.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/core branch of tip:

Commit-ID:     fb99ed1e00c73dbee2bef77544aa5629edecaae2
Gitweb:        https://git.kernel.org/tip/fb99ed1e00c73dbee2bef77544aa5629edecaae2
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:22 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 19 Mar 2025 11:19:25 +01:00

x86/cpuid: Clean up <asm/cpuid/api.h>

 - Include <asm/cpuid/types.h> first, as is customary. This also has
   the side effect of build-testing the header dependency assumptions
   in the types header.

 - No newline necessary after the SPDX line

 - Newline necessary after inline function definitions

 - Rename native_cpuid_reg() to NATIVE_CPUID_REG(): it's a CPP macro,
   whose name we capitalize in such cases.

 - Prettify the CONFIG_PARAVIRT_XXL inclusion block a bit

 - Standardize register references in comments to EAX/EBX/ECX/etc.,
   from the hodgepodge of references.

 - s/cpus/CPUs because why add noise to common acronyms?

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-4-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/api.h | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index 4d1da9c..f26926b 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -1,16 +1,16 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-
 #ifndef _ASM_X86_CPUID_API_H
 #define _ASM_X86_CPUID_API_H
 
+#include <asm/cpuid/types.h>
+
 #include <linux/build_bug.h>
 #include <linux/types.h>
 
-#include <asm/cpuid/types.h>
 #include <asm/string.h>
 
 /*
- * Raw CPUID accessors
+ * Raw CPUID accessors:
  */
 
 #ifdef CONFIG_X86_32
@@ -21,6 +21,7 @@ static inline bool have_cpuid_p(void)
 	return true;
 }
 #endif
+
 static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 				unsigned int *ecx, unsigned int *edx)
 {
@@ -34,7 +35,7 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 	    : "memory");
 }
 
-#define native_cpuid_reg(reg)					\
+#define NATIVE_CPUID_REG(reg)					\
 static inline unsigned int native_cpuid_##reg(unsigned int op)	\
 {								\
 	unsigned int eax = op, ebx, ecx = 0, edx;		\
@@ -45,22 +46,23 @@ static inline unsigned int native_cpuid_##reg(unsigned int op)	\
 }
 
 /*
- * Native CPUID functions returning a single datum.
+ * Native CPUID functions returning a single datum:
  */
-native_cpuid_reg(eax)
-native_cpuid_reg(ebx)
-native_cpuid_reg(ecx)
-native_cpuid_reg(edx)
+NATIVE_CPUID_REG(eax)
+NATIVE_CPUID_REG(ebx)
+NATIVE_CPUID_REG(ecx)
+NATIVE_CPUID_REG(edx)
 
 #ifdef CONFIG_PARAVIRT_XXL
-#include <asm/paravirt.h>
+# include <asm/paravirt.h>
 #else
-#define __cpuid			native_cpuid
+# define __cpuid native_cpuid
 #endif
 
 /*
  * Generic CPUID function
- * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
+ *
+ * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX
  * resulting in stale register contents being returned.
  */
 static inline void cpuid(unsigned int op,
@@ -72,7 +74,7 @@ static inline void cpuid(unsigned int op,
 	__cpuid(eax, ebx, ecx, edx);
 }
 
-/* Some CPUID calls want 'count' to be placed in ecx */
+/* Some CPUID calls want 'count' to be placed in ECX */
 static inline void cpuid_count(unsigned int op, int count,
 			       unsigned int *eax, unsigned int *ebx,
 			       unsigned int *ecx, unsigned int *edx)
@@ -83,7 +85,7 @@ static inline void cpuid_count(unsigned int op, int count,
 }
 
 /*
- * CPUID functions returning a single datum
+ * CPUID functions returning a single datum:
  */
 
 static inline unsigned int cpuid_eax(unsigned int op)

[PATCH 4/5] x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>

[Ingo Molnar]

Convert all uses of 'unsigned int' to 'u32' in <asm/cpuid/api.h>.

This is how a lot of the call sites are doing it, and the two
types are equivalent in the C sense - but 'u32' better expresses
that these are expressions of an immutable hardware ABI.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Ahmed S. Darwish <darwi@linutronix.de>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317164745.4754-3-darwi@linutronix.de
---
 arch/x86/include/asm/cpuid/api.h | 40 ++++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index f26926ba5289..356db1894588 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -22,8 +22,8 @@ static inline bool have_cpuid_p(void)
 }
 #endif
 
-static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
-				unsigned int *ecx, unsigned int *edx)
+static inline void native_cpuid(u32 *eax, u32 *ebx,
+				u32 *ecx, u32 *edx)
 {
 	/* ecx is often an input as well as an output. */
 	asm volatile("cpuid"
@@ -36,9 +36,9 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 }
 
 #define NATIVE_CPUID_REG(reg)					\
-static inline unsigned int native_cpuid_##reg(unsigned int op)	\
+static inline u32 native_cpuid_##reg(u32 op)	\
 {								\
-	unsigned int eax = op, ebx, ecx = 0, edx;		\
+	u32 eax = op, ebx, ecx = 0, edx;		\
 								\
 	native_cpuid(&eax, &ebx, &ecx, &edx);			\
 								\
@@ -65,9 +65,9 @@ NATIVE_CPUID_REG(edx)
  * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX
  * resulting in stale register contents being returned.
  */
-static inline void cpuid(unsigned int op,
-			 unsigned int *eax, unsigned int *ebx,
-			 unsigned int *ecx, unsigned int *edx)
+static inline void cpuid(u32 op,
+			 u32 *eax, u32 *ebx,
+			 u32 *ecx, u32 *edx)
 {
 	*eax = op;
 	*ecx = 0;
@@ -75,9 +75,9 @@ static inline void cpuid(unsigned int op,
 }
 
 /* Some CPUID calls want 'count' to be placed in ECX */
-static inline void cpuid_count(unsigned int op, int count,
-			       unsigned int *eax, unsigned int *ebx,
-			       unsigned int *ecx, unsigned int *edx)
+static inline void cpuid_count(u32 op, int count,
+			       u32 *eax, u32 *ebx,
+			       u32 *ecx, u32 *edx)
 {
 	*eax = op;
 	*ecx = count;
@@ -88,43 +88,43 @@ static inline void cpuid_count(unsigned int op, int count,
  * CPUID functions returning a single datum:
  */
 
-static inline unsigned int cpuid_eax(unsigned int op)
+static inline u32 cpuid_eax(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return eax;
 }
 
-static inline unsigned int cpuid_ebx(unsigned int op)
+static inline u32 cpuid_ebx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return ebx;
 }
 
-static inline unsigned int cpuid_ecx(unsigned int op)
+static inline u32 cpuid_ecx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return ecx;
 }
 
-static inline unsigned int cpuid_edx(unsigned int op)
+static inline u32 cpuid_edx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return edx;
 }
 
-static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
+static inline void __cpuid_read(u32 leaf, u32 subleaf, u32 *regs)
 {
 	regs[CPUID_EAX] = leaf;
 	regs[CPUID_ECX] = subleaf;
@@ -141,7 +141,7 @@ static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *re
 	__cpuid_read(leaf, 0, (u32 *)(regs));		\
 }
 
-static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
+static inline void __cpuid_read_reg(u32 leaf, u32 subleaf,
 				    enum cpuid_regs_idx regidx, u32 *reg)
 {
 	u32 regs[4];
-- 
2.45.2

Re: [PATCH 4/5] x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>

[Xin Li]

On 3/17/2025 3:18 PM, Ingo Molnar wrote:
> Convert all uses of 'unsigned int' to 'u32' in <asm/cpuid/api.h>.
> 
> This is how a lot of the call sites are doing it, and the two
> types are equivalent in the C sense - but 'u32' better expresses
> that these are expressions of an immutable hardware ABI.
> 
> Signed-off-by: Ingo Molnar <mingo@kernel.org>
> Cc: Ahmed S. Darwish <darwi@linutronix.de>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: John Ogness <john.ogness@linutronix.de>
> Cc: x86-cpuid@lists.linux.dev
> Link: https://lore.kernel.org/r/20250317164745.4754-3-darwi@linutronix.de
> ---
>   arch/x86/include/asm/cpuid/api.h | 40 ++++++++++++++++++++--------------------
>   1 file changed, 20 insertions(+), 20 deletions(-)
> 
> diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
> index f26926ba5289..356db1894588 100644
> --- a/arch/x86/include/asm/cpuid/api.h
> +++ b/arch/x86/include/asm/cpuid/api.h
> @@ -22,8 +22,8 @@ static inline bool have_cpuid_p(void)
>   }
>   #endif
>   
> -static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
> -				unsigned int *ecx, unsigned int *edx)
> +static inline void native_cpuid(u32 *eax, u32 *ebx,
> +				u32 *ecx, u32 *edx)
>   {
>   	/* ecx is often an input as well as an output. */
>   	asm volatile("cpuid"
> @@ -36,9 +36,9 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
>   }
>   
>   #define NATIVE_CPUID_REG(reg)					\
> -static inline unsigned int native_cpuid_##reg(unsigned int op)	\
> +static inline u32 native_cpuid_##reg(u32 op)	\
>   {								\
> -	unsigned int eax = op, ebx, ecx = 0, edx;		\
> +	u32 eax = op, ebx, ecx = 0, edx;		\
>   								\
>   	native_cpuid(&eax, &ebx, &ecx, &edx);			\
>   								\
> @@ -65,9 +65,9 @@ NATIVE_CPUID_REG(edx)
>    * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX
>    * resulting in stale register contents being returned.
>    */
> -static inline void cpuid(unsigned int op,
> -			 unsigned int *eax, unsigned int *ebx,
> -			 unsigned int *ecx, unsigned int *edx)
> +static inline void cpuid(u32 op,
> +			 u32 *eax, u32 *ebx,
> +			 u32 *ecx, u32 *edx)
>   {
>   	*eax = op;
>   	*ecx = 0;
> @@ -75,9 +75,9 @@ static inline void cpuid(unsigned int op,
>   }
>   
>   /* Some CPUID calls want 'count' to be placed in ECX */
> -static inline void cpuid_count(unsigned int op, int count,
> -			       unsigned int *eax, unsigned int *ebx,
> -			       unsigned int *ecx, unsigned int *edx)
> +static inline void cpuid_count(u32 op, int count,
> +			       u32 *eax, u32 *ebx,
> +			       u32 *ecx, u32 *edx)
>   {
>   	*eax = op;
>   	*ecx = count;
> @@ -88,43 +88,43 @@ static inline void cpuid_count(unsigned int op, int count,
>    * CPUID functions returning a single datum:
>    */
>   
> -static inline unsigned int cpuid_eax(unsigned int op)
> +static inline u32 cpuid_eax(u32 op)
>   {
> -	unsigned int eax, ebx, ecx, edx;
> +	u32 eax, ebx, ecx, edx;
>   
>   	cpuid(op, &eax, &ebx, &ecx, &edx);
>   
>   	return eax;
>   }
>   
> -static inline unsigned int cpuid_ebx(unsigned int op)
> +static inline u32 cpuid_ebx(u32 op)
>   {
> -	unsigned int eax, ebx, ecx, edx;
> +	u32 eax, ebx, ecx, edx;
>   
>   	cpuid(op, &eax, &ebx, &ecx, &edx);
>   
>   	return ebx;
>   }
>   
> -static inline unsigned int cpuid_ecx(unsigned int op)
> +static inline u32 cpuid_ecx(u32 op)
>   {
> -	unsigned int eax, ebx, ecx, edx;
> +	u32 eax, ebx, ecx, edx;
>   
>   	cpuid(op, &eax, &ebx, &ecx, &edx);
>   
>   	return ecx;
>   }
>   
> -static inline unsigned int cpuid_edx(unsigned int op)
> +static inline u32 cpuid_edx(u32 op)
>   {
> -	unsigned int eax, ebx, ecx, edx;
> +	u32 eax, ebx, ecx, edx;
>   
>   	cpuid(op, &eax, &ebx, &ecx, &edx);
>   
>   	return edx;
>   }
>   
> -static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
> +static inline void __cpuid_read(u32 leaf, u32 subleaf, u32 *regs)
>   {
>   	regs[CPUID_EAX] = leaf;
>   	regs[CPUID_ECX] = subleaf;
> @@ -141,7 +141,7 @@ static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *re
>   	__cpuid_read(leaf, 0, (u32 *)(regs));		\
>   }
>   
> -static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
> +static inline void __cpuid_read_reg(u32 leaf, u32 subleaf,
>   				    enum cpuid_regs_idx regidx, u32 *reg)
>   {
>   	u32 regs[4];

A nice move to set the standard.

When refactoring the MSR code, I also converted all unsigned int to u32.

Reviewed-by: Xin Li (Intel) <xin@zytor.com>

[tip: x86/cpu] x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     aec28d852ed27499a944e37801ed815ab9af3a0e
Gitweb:        https://git.kernel.org/tip/aec28d852ed27499a944e37801ed815ab9af3a0e
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:23 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Tue, 18 Mar 2025 09:35:58 +01:00

x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>

Convert all uses of 'unsigned int' to 'u32' in <asm/cpuid/api.h>.

This is how a lot of the call sites are doing it, and the two
types are equivalent in the C sense - but 'u32' better expresses
that these are expressions of an immutable hardware ABI.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Xin Li (Intel) <xin@zytor.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-5-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/api.h | 40 +++++++++++++++----------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index f26926b..356db18 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -22,8 +22,8 @@ static inline bool have_cpuid_p(void)
 }
 #endif
 
-static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
-				unsigned int *ecx, unsigned int *edx)
+static inline void native_cpuid(u32 *eax, u32 *ebx,
+				u32 *ecx, u32 *edx)
 {
 	/* ecx is often an input as well as an output. */
 	asm volatile("cpuid"
@@ -36,9 +36,9 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 }
 
 #define NATIVE_CPUID_REG(reg)					\
-static inline unsigned int native_cpuid_##reg(unsigned int op)	\
+static inline u32 native_cpuid_##reg(u32 op)	\
 {								\
-	unsigned int eax = op, ebx, ecx = 0, edx;		\
+	u32 eax = op, ebx, ecx = 0, edx;		\
 								\
 	native_cpuid(&eax, &ebx, &ecx, &edx);			\
 								\
@@ -65,9 +65,9 @@ NATIVE_CPUID_REG(edx)
  * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX
  * resulting in stale register contents being returned.
  */
-static inline void cpuid(unsigned int op,
-			 unsigned int *eax, unsigned int *ebx,
-			 unsigned int *ecx, unsigned int *edx)
+static inline void cpuid(u32 op,
+			 u32 *eax, u32 *ebx,
+			 u32 *ecx, u32 *edx)
 {
 	*eax = op;
 	*ecx = 0;
@@ -75,9 +75,9 @@ static inline void cpuid(unsigned int op,
 }
 
 /* Some CPUID calls want 'count' to be placed in ECX */
-static inline void cpuid_count(unsigned int op, int count,
-			       unsigned int *eax, unsigned int *ebx,
-			       unsigned int *ecx, unsigned int *edx)
+static inline void cpuid_count(u32 op, int count,
+			       u32 *eax, u32 *ebx,
+			       u32 *ecx, u32 *edx)
 {
 	*eax = op;
 	*ecx = count;
@@ -88,43 +88,43 @@ static inline void cpuid_count(unsigned int op, int count,
  * CPUID functions returning a single datum:
  */
 
-static inline unsigned int cpuid_eax(unsigned int op)
+static inline u32 cpuid_eax(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return eax;
 }
 
-static inline unsigned int cpuid_ebx(unsigned int op)
+static inline u32 cpuid_ebx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return ebx;
 }
 
-static inline unsigned int cpuid_ecx(unsigned int op)
+static inline u32 cpuid_ecx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return ecx;
 }
 
-static inline unsigned int cpuid_edx(unsigned int op)
+static inline u32 cpuid_edx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return edx;
 }
 
-static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
+static inline void __cpuid_read(u32 leaf, u32 subleaf, u32 *regs)
 {
 	regs[CPUID_EAX] = leaf;
 	regs[CPUID_ECX] = subleaf;
@@ -141,7 +141,7 @@ static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *re
 	__cpuid_read(leaf, 0, (u32 *)(regs));		\
 }
 
-static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
+static inline void __cpuid_read_reg(u32 leaf, u32 subleaf,
 				    enum cpuid_regs_idx regidx, u32 *reg)
 {
 	u32 regs[4];

[tip: x86/core] x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/core branch of tip:

Commit-ID:     cfb4fc5f089a90b44832656ebe4504fcc41058ea
Gitweb:        https://git.kernel.org/tip/cfb4fc5f089a90b44832656ebe4504fcc41058ea
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:23 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 19 Mar 2025 11:19:26 +01:00

x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>

Convert all uses of 'unsigned int' to 'u32' in <asm/cpuid/api.h>.

This is how a lot of the call sites are doing it, and the two
types are equivalent in the C sense - but 'u32' better expresses
that these are expressions of an immutable hardware ABI.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Xin Li (Intel) <xin@zytor.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-5-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/api.h | 40 +++++++++++++++----------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index f26926b..356db18 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -22,8 +22,8 @@ static inline bool have_cpuid_p(void)
 }
 #endif
 
-static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
-				unsigned int *ecx, unsigned int *edx)
+static inline void native_cpuid(u32 *eax, u32 *ebx,
+				u32 *ecx, u32 *edx)
 {
 	/* ecx is often an input as well as an output. */
 	asm volatile("cpuid"
@@ -36,9 +36,9 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 }
 
 #define NATIVE_CPUID_REG(reg)					\
-static inline unsigned int native_cpuid_##reg(unsigned int op)	\
+static inline u32 native_cpuid_##reg(u32 op)	\
 {								\
-	unsigned int eax = op, ebx, ecx = 0, edx;		\
+	u32 eax = op, ebx, ecx = 0, edx;		\
 								\
 	native_cpuid(&eax, &ebx, &ecx, &edx);			\
 								\
@@ -65,9 +65,9 @@ NATIVE_CPUID_REG(edx)
  * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX
  * resulting in stale register contents being returned.
  */
-static inline void cpuid(unsigned int op,
-			 unsigned int *eax, unsigned int *ebx,
-			 unsigned int *ecx, unsigned int *edx)
+static inline void cpuid(u32 op,
+			 u32 *eax, u32 *ebx,
+			 u32 *ecx, u32 *edx)
 {
 	*eax = op;
 	*ecx = 0;
@@ -75,9 +75,9 @@ static inline void cpuid(unsigned int op,
 }
 
 /* Some CPUID calls want 'count' to be placed in ECX */
-static inline void cpuid_count(unsigned int op, int count,
-			       unsigned int *eax, unsigned int *ebx,
-			       unsigned int *ecx, unsigned int *edx)
+static inline void cpuid_count(u32 op, int count,
+			       u32 *eax, u32 *ebx,
+			       u32 *ecx, u32 *edx)
 {
 	*eax = op;
 	*ecx = count;
@@ -88,43 +88,43 @@ static inline void cpuid_count(unsigned int op, int count,
  * CPUID functions returning a single datum:
  */
 
-static inline unsigned int cpuid_eax(unsigned int op)
+static inline u32 cpuid_eax(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return eax;
 }
 
-static inline unsigned int cpuid_ebx(unsigned int op)
+static inline u32 cpuid_ebx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return ebx;
 }
 
-static inline unsigned int cpuid_ecx(unsigned int op)
+static inline u32 cpuid_ecx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return ecx;
 }
 
-static inline unsigned int cpuid_edx(unsigned int op)
+static inline u32 cpuid_edx(u32 op)
 {
-	unsigned int eax, ebx, ecx, edx;
+	u32 eax, ebx, ecx, edx;
 
 	cpuid(op, &eax, &ebx, &ecx, &edx);
 
 	return edx;
 }
 
-static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *regs)
+static inline void __cpuid_read(u32 leaf, u32 subleaf, u32 *regs)
 {
 	regs[CPUID_EAX] = leaf;
 	regs[CPUID_ECX] = subleaf;
@@ -141,7 +141,7 @@ static inline void __cpuid_read(unsigned int leaf, unsigned int subleaf, u32 *re
 	__cpuid_read(leaf, 0, (u32 *)(regs));		\
 }
 
-static inline void __cpuid_read_reg(unsigned int leaf, unsigned int subleaf,
+static inline void __cpuid_read_reg(u32 leaf, u32 subleaf,
 				    enum cpuid_regs_idx regidx, u32 *reg)
 {
 	u32 regs[4];

[PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Ingo Molnar]

Use u32 instead of uint32_t in hypervisor_cpuid_base().

Yes, I realize uint32_t is used in Xen code et al, but this is
a core x86 architecture header and we should standardize on the
type that is being used overwhelmingly in related x86 architecture
code.

The two types are the same so there should be no build warnings.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Ahmed S. Darwish <darwi@linutronix.de>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317164745.4754-3-darwi@linutronix.de
---
 arch/x86/include/asm/cpuid/api.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index 356db1894588..9c180c9cc58e 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -187,9 +187,9 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)
 #define for_each_possible_hypervisor_cpuid_base(function) \
 	for (function = 0x40000000; function < 0x40010000; function += 0x100)
 
-static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
+static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
 {
-	uint32_t base, eax, signature[3];
+	u32 base, eax, signature[3];
 
 	for_each_possible_hypervisor_cpuid_base(base) {
 		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
-- 
2.45.2

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Xin Li]

On 3/17/2025 3:18 PM, Ingo Molnar wrote:
> Use u32 instead of uint32_t in hypervisor_cpuid_base().
> 
> Yes, I realize uint32_t is used in Xen code et al, but this is
> a core x86 architecture header and we should standardize on the

no "we", right?

> type that is being used overwhelmingly in related x86 architecture
> code.
> 
> The two types are the same so there should be no build warnings.
> 
> Signed-off-by: Ingo Molnar <mingo@kernel.org>
> Cc: Juergen Gross <jgross@suse.com>
> Cc: Stefano Stabellini <sstabellini@kernel.org>
> Cc: Ahmed S. Darwish <darwi@linutronix.de>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: John Ogness <john.ogness@linutronix.de>
> Cc: x86-cpuid@lists.linux.dev
> Link: https://lore.kernel.org/r/20250317164745.4754-3-darwi@linutronix.de
> ---
>   arch/x86/include/asm/cpuid/api.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
> index 356db1894588..9c180c9cc58e 100644
> --- a/arch/x86/include/asm/cpuid/api.h
> +++ b/arch/x86/include/asm/cpuid/api.h
> @@ -187,9 +187,9 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)
>   #define for_each_possible_hypervisor_cpuid_base(function) \
>   	for (function = 0x40000000; function < 0x40010000; function += 0x100)
>   
> -static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
> +static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
>   {
> -	uint32_t base, eax, signature[3];
> +	u32 base, eax, signature[3];
>   
>   	for_each_possible_hypervisor_cpuid_base(base) {
>   		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Ingo Molnar]

* Xin Li <xin@zytor.com> wrote:

> On 3/17/2025 3:18 PM, Ingo Molnar wrote:
> > Use u32 instead of uint32_t in hypervisor_cpuid_base().
> > 
> > Yes, I realize uint32_t is used in Xen code et al, but this is
> > a core x86 architecture header and we should standardize on the
> 
> no "we", right?

That's a stupid rule, I don't know where it came from, and I never 
enforced it. It's not in Documentation/process/coding-style.rst.

Linus doesn't use this pointless rule of 'pronoun avoidance' in 
changelogs either:

  00a7d39898c8 ("fs/pipe: add simpler helpers for common cases")

  https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=00a7d39898c8010bfd5ff62af31ca5db34421b38  

    It turns out that we don't have _that_ many places that access these
                      ^^
    fields directly and were affected, but we have more than we strictly
                                           ^^                ^^
    should have, because our low-level helper functions have been designed
    to have intimate knowledge of how the pipes work.
    
    And as a result, that random noise of direct 'pipe->head' and
    'pipe->tail' accesses makes it harder to pinpoint any actual potential
    problem spots remaining.
    
    For example, we didn't have a "is the pipe full" helper function, but
                 ^^
    instead had a "given these pipe buffer indexes and this pipe size, is
    the pipe full".  That's because some low-level pipe code does actually
    want that much more complicated interface.

In changelogs 'we' when used as a generic personal pronoun means the 
kernel and the kernel community in general. It's a perfectly fine 
grammatical construct.

Thanks,

	Ingo

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Borislav Petkov]

On Tue, Mar 18, 2025 at 09:34:41AM +0100, Ingo Molnar wrote:
> That's a stupid rule, I don't know where it came from, and I never 
> enforced it. It's not in Documentation/process/coding-style.rst.

I believe tglx came up with it - section "Changelog" in

Documentation/process/maintainer-tip.rst

Read the examples there.

And you and I have had this conversation already on IRC. I happen to agree
with him that "we" is ambiguous - with all those companies submitting patches
you don't know who's "we" interests are being taken care of.

And if you formulate your commit message in impersonal tone, it reads a lot
clearer. It is simply a lot better this way.

Is it a hard rule? Ofc not - there are exceptions to that rule depending on
the context. But most if the time and IMNSVHO, impersonal formulations read
a lot better and clearer.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Ingo Molnar]

* Borislav Petkov <bp@alien8.de> wrote:

> On Tue, Mar 18, 2025 at 09:34:41AM +0100, Ingo Molnar wrote:
> > That's a stupid rule, I don't know where it came from, and I never 
> > enforced it. It's not in Documentation/process/coding-style.rst.
> 
> I believe tglx came up with it - section "Changelog" in
> 
> Documentation/process/maintainer-tip.rst
> 
> Read the examples there.

Literally the first example there is kinda bogus:

  Example 1::

    ...

    When a CPU is dying, we cancel the worker and schedule a new worker 
    on a different CPU on the same domain.

  Improved version::

    ... 

    When a CPU is dying, the worker is canceled and a new worker is 
    scheduled on a different CPU in the same domain.

[ Note that I edited the first example to be a true equivalent 
  transformation to passive voice. The example in maintainer-tip.rst 
  makes other edits too which make it hard to compare. ]

How is one more word and saying the same thing in a more circumspect 
fashion a liguistic improvement?

And you don't have to believe me - I gave an LLM the following prompt:

  Which English sentence is easier to understand:
    "When a CPU is dying, the worker is canceled and a new worker is 
     scheduled on a different CPU in the same domain."
  or
    "When a CPU is dying, we cancel the worker and schedule a new worker 
     on a different CPU on the same domain."?

And it answered:

  The second sentence, "When a CPU is dying, we cancel the worker and 
  schedule a new worker on a different CPU on the same domain," is easier 
  to understand. It uses simpler language and a more direct structure, 
  making it clearer for the reader.

... and although I'd be the first one to distrust an LLM's opinion, 
it's correct in this case IMHO.

> And you and I have had this conversation already on IRC. I happen to 
> agree with him that "we" is ambiguous - with all those companies 
> submitting patches you don't know who's "we" interests are being 
> taken care of.

Few people will understand a generic personal pronoun to apply to a 
corporate entity magically, unless it's really clear and specific:

	"We at Intel believe that this condition cannot occur on Intel 
	 hardware."

in which case it's not a generic personal pronoun anymore.

Or to give another data point: since the v6.13 merge cycle we have 
merged over 11,000 commits in the upstream kernel, and over 1,500 
contain the word 'we' - over 13% of all commits. This is literally a 
pointless battle that creates unnecessary maintenance overhead and 
pointless detours for developers.

> And if you formulate your commit message in impersonal tone, it reads a lot
> clearer. It is simply a lot better this way.

Except *not even we* follow it consistently:

  starship:~/tip> gl --author=tglx --since=two-years-ago --grep='\<we\>' linus | grep -iw we
         by a context from task B and we do the check
    So it turns out that we have to do two passes of
      "The problem in current microcode loading method is that we load a
       microcode way, way too late; ideally we should load it before turning
       paging on.  This may only be practical on 32 bits since we can't get
       to 64-bit mode without paging on, but we should still do it as early
    MADT delivers we only trust the hardware anyway.
             * booting is too fragile that we want to limit the

Because it's actually a natural and direct linguistic construct.

And have a look at:

   $ gl --author=torvalds --since=two-years-ago --grep='\<we\>' linus | grep -iw we

it's 1352 examples of Linus using 'we' as a generic personal pronoun in 
the last 2 years alone...

Thanks,

	Ingo

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Borislav Petkov]

On Tue, Mar 18, 2025 at 12:53:05PM +0100, Ingo Molnar wrote:
> How is one more word and saying the same thing in a more circumspect 
> fashion a liguistic improvement?

Because it removes the "we" out of the equation. I don't have to wonder who's
the "we" the author is talking about: his employer, his private interests in
Linux or "we" is actually "us" - the community as a whole.

I can't give a more honking example about the ambiguity here.

>   The second sentence, "When a CPU is dying, we cancel the worker and 
>   schedule a new worker on a different CPU on the same domain," is easier 
>   to understand. It uses simpler language and a more direct structure, 
>   making it clearer for the reader.

I disagree with the LLM - it is yet another proof that AI won't replace
humans - if anything it'll make them *think* more. Which is good! :-)

> Few people will understand a generic personal pronoun to apply to a 
> corporate entity magically, unless it's really clear and specific:
> 
> 	"We at Intel believe that this condition cannot occur on Intel 
> 	 hardware."
> 
> in which case it's not a generic personal pronoun anymore.

Except no one says "we at <company>" - they say "we" ambiguously. And I have
had gazillion examples of "we the company want Linux to do this and that
because our use case is bla".

> Or to give another data point: since the v6.13 merge cycle we have 

<snip the stats>

That's why I said

"Is it a hard rule? Ofc not - there are exceptions to that rule depending on
the context."

And we have said "we" for 30+ years so can't change that over night. And not
everyone agrees with that. I understand it all.

I still think that in some cases formulating a commit message in impersonal
style lets you concentrate on the *problem* at hand the commit is trying to
fix - not what we do or want. It removes the person out of the equation
because the person doesn't need to be there.

HOWEVER, it is perfectly fine to say "I did this and that and I've been
wondering for years why the code does what it does." because it adds that
additional coloring about the trials and tribulations of the author.

So no, it is not a hard rule but there is an undeniable merit in writing the
commit messages impersonal.

And that's fine - I fix up things from time to time when they bother me.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Ingo Molnar]

* Borislav Petkov <bp@alien8.de> wrote:

> On Tue, Mar 18, 2025 at 12:53:05PM +0100, Ingo Molnar wrote:
> > How is one more word and saying the same thing in a more circumspect 
> > fashion a liguistic improvement?
> 
> Because it removes the "we" out of the equation. I don't have to 
> wonder who's the "we" the author is talking about: his employer, his 
> private interests in Linux or "we" is actually "us" - the community 
> as a whole.

In practice this is almost never ambiguous - and when it is, it can be 
fixed up.

> I can't give a more honking example about the ambiguity here.

It's a red herring fallacy really. Let's go over the first example 
given in Documentation/process/maintainer-tip.rst:

    x86/intel_rdt/mbm: Fix MBM overflow handler during hot cpu

    When a CPU is dying, we cancel the worker and schedule a new worker on a
    different CPU on the same domain. But if the timer is already about to
    expire (say 0.99s) then we essentially double the interval.

You'd have to be a bumbling idiot to think that the 'we' means an 
employer or the person themselves ...

Put differently: *the very first example given* uses 'we' functionally 
unambiguously so that everyone who can read kernel changelogs will 
understand what it says. Ie. the whole policy is based on a false 
statement...

Very few of the 'we' general pronouns used in kernel changelogs are 
actually ambiguous. This means that any crusade to eliminate 'we' from 
changelogs is not just pointless, but also a waste of resources - it's 
a net negative. At least IMHO. ;-)

> >   The second sentence, "When a CPU is dying, we cancel the worker 
> >   and schedule a new worker on a different CPU on the same domain," 
> >   is easier to understand. It uses simpler language and a more 
> >   direct structure, making it clearer for the reader.
> 
> I disagree with the LLM - it is yet another proof that AI won't 
> replace humans - if anything it'll make them *think* more. Which is 
> good! :-)

Yeah, and in any case, tastes differ, so no strong feelings from me 
either! :-)

Thanks,

	Ingo

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Thomas Gleixner]

On Tue, Mar 18 2025 at 19:20, Ingo Molnar wrote:
> * Borislav Petkov <bp@alien8.de> wrote:
>> On Tue, Mar 18, 2025 at 12:53:05PM +0100, Ingo Molnar wrote:
>> > How is one more word and saying the same thing in a more circumspect 
>> > fashion a liguistic improvement?
>> 
>> Because it removes the "we" out of the equation. I don't have to 
>> wonder who's the "we" the author is talking about: his employer, his 
>> private interests in Linux or "we" is actually "us" - the community 
>> as a whole.
>
> In practice this is almost never ambiguous - and when it is, it can be 
> fixed up.
>
>> I can't give a more honking example about the ambiguity here.
>
> It's a red herring fallacy really. Let's go over the first example 
> given in Documentation/process/maintainer-tip.rst:
>
>     x86/intel_rdt/mbm: Fix MBM overflow handler during hot cpu
>
>     When a CPU is dying, we cancel the worker and schedule a new worker on a
>     different CPU on the same domain. But if the timer is already about to
>     expire (say 0.99s) then we essentially double the interval.
>
> You'd have to be a bumbling idiot to think that the 'we' means an 
> employer or the person themselves ...
>
> Put differently: *the very first example given* uses 'we' functionally 
> unambiguously so that everyone who can read kernel changelogs will 
> understand what it says. Ie. the whole policy is based on a false 
> statement...

That's complete and utter nonsense.

'we cancel the worker, we call kmalloc()' are purely colloquial
expressions. Liguistically they are factually wrong abominations.

We can cancel a subscription, an appointment, a booking...
We can call a taxi, a ambulance, a doctor, ....

But as a matter of fact, we _cannot_ cancel a worker or call kmalloc().

Changelogs as any other serious writing in technical context are about
precision and clarity.

The impersonating form is obviously popular and in some contexts, like
tutorials and beginner guides, it makes them seemingly more accessible,
but that does not provide an justification for using it in the context
of change logs.

Change logs are an important documentation of the underlying code
change, because they provide context and technical justification for the
change and therefore have to prioritize precision and clarity.

Aside of that ,writing a change log in neutral and technically precise
language forces you to actually rethink the problem and the approach to
solve it. Dumping your half baked thoughts in impersonating novel style
does not.

From 20+ years of experience on the receiving end of the patch fire
hose, I can clearly proof a very high correlation between the quality of
change logs and the quality of the analysis and the resulting code
change.

Yes, it is work to write a proper and precise change log, but that extra
effort makes the work of people, who review patches, easier and it's
also highly benefitial, when analyising historical changes.

Thanks,

        tglx

Re: [PATCH 5/5] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[Ingo Molnar]

* Thomas Gleixner <tglx@linutronix.de> wrote:

> On Tue, Mar 18 2025 at 19:20, Ingo Molnar wrote:
> > * Borislav Petkov <bp@alien8.de> wrote:
> >> On Tue, Mar 18, 2025 at 12:53:05PM +0100, Ingo Molnar wrote:
> >> > How is one more word and saying the same thing in a more circumspect 
> >> > fashion a liguistic improvement?
> >> 
> >> Because it removes the "we" out of the equation. I don't have to 
> >> wonder who's the "we" the author is talking about: his employer, his 
> >> private interests in Linux or "we" is actually "us" - the community 
> >> as a whole.
> >
> > In practice this is almost never ambiguous - and when it is, it can be 
> > fixed up.
> >
> >> I can't give a more honking example about the ambiguity here.
> >
> > It's a red herring fallacy really. Let's go over the first example 
> > given in Documentation/process/maintainer-tip.rst:
> >
> >     x86/intel_rdt/mbm: Fix MBM overflow handler during hot cpu
> >
> >     When a CPU is dying, we cancel the worker and schedule a new worker on a
> >     different CPU on the same domain. But if the timer is already about to
> >     expire (say 0.99s) then we essentially double the interval.
> >
> > You'd have to be a bumbling idiot to think that the 'we' means an 
> > employer or the person themselves ...
> >
> > Put differently: *the very first example given* uses 'we' functionally 
> > unambiguously so that everyone who can read kernel changelogs will 
> > understand what it says. Ie. the whole policy is based on a false 
> > statement...
> 
> That's complete and utter nonsense.

I love you too! :-)

> 'we cancel the worker, we call kmalloc()' are purely colloquial 
> expressions.

So what? I have no problem with colloquial, familiar, everyday language 
in a technical context as long as it's effective and unambiguous.

The main linguistic advantage of German engineering is the ability to 
construct new, unambiguous words out of thin air:

   "Donaudampfschifffahrtselektrizitätenhauptbetriebswerkbauunternehmenbeamtengesellschaft"

... not the cold, impersonal tone. And I say that as a German, and yes, 
the 87-letter word above is a real, valid German word. :-)

> Liguistically they are factually wrong abominations.
> 
> We can cancel a subscription, an appointment, a booking... We can 
> call a taxi, a ambulance, a doctor, ....
> 
> But as a matter of fact, we _cannot_ cancel a worker or call 
> kmalloc().

Nor can we read a source buffer, nor can we do multiple writes to a 
destination buffer, right?

Tell that to Linus, who arguably writes one of the best changelogs in 
the kernel:

  # 9022ed0e7e65 ("strscpy: write destination buffer only once")

    In particular, the same way we shouldn't read the source buffer more
                                ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
    than once, we should avoid doing multiple writes to the destination
               ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
    buffer: first writing a potentially non-terminated string, and then
    ^^^^^^^
    terminating it with NUL at the end does not result in a stable result
    buffer.

And I think the moment you have to argue against the quality of Linus's 
changelogs you've lost the argument really, almost by default.

> Changelogs as any other serious writing in technical context are about
> precision and clarity.

Absolutely, and 'we' in this context unambiguously means the kernel, so 
it's as clear to me as it gets.

I (obviously) agree with most of the stylistic and linguistic 
suggestions in Documentation/process/maintainer-tip.rst, and maybe my 
reaction was a bit hyperbolic (sorry), I just pointed out that this 
silly avoidance of pronouns like 'we' - which started the discussion - 
which results in *sentences with more words*, is *obviously* 
counterproductive.

Longer sentences with the same information content == worse.

To visualize it:

  When a CPU is dying, the worker is canceled and a new worker is scheduled on a different CPU in the same domain.
  When a CPU is dying, we cancel the worker and schedule a new worker on a different CPU in the same domain.

In communication shorter is better, if the information content is 
otherwise equivalent.

Anyway, let's agree to disagree. :-)

Thanks,

	Ingo

[tip: x86/cpu] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     ba501f14e1e6dcc94ff0276301e997ae28e3f4b3
Gitweb:        https://git.kernel.org/tip/ba501f14e1e6dcc94ff0276301e997ae28e3f4b3
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:24 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Tue, 18 Mar 2025 09:35:58 +01:00

x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

Use u32 instead of uint32_t in hypervisor_cpuid_base().

Yes, uint32_t is used in Xen code et al, but this is a core x86
architecture header and we should standardize on the type that
is being used overwhelmingly in related x86 architecture code.

The two types are the same so there should be no build warnings.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-6-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/api.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index 356db18..9c180c9 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -187,9 +187,9 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)
 #define for_each_possible_hypervisor_cpuid_base(function) \
 	for (function = 0x40000000; function < 0x40010000; function += 0x100)
 
-static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
+static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
 {
-	uint32_t base, eax, signature[3];
+	u32 base, eax, signature[3];
 
 	for_each_possible_hypervisor_cpuid_base(base) {
 		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);

[tip: x86/core] x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

[tip-bot2 for Ingo Molnar]

The following commit has been merged into the x86/core branch of tip:

Commit-ID:     a46f322661857d58b93f557bcb708260f18c18fd
Gitweb:        https://git.kernel.org/tip/a46f322661857d58b93f557bcb708260f18c18fd
Author:        Ingo Molnar <mingo@kernel.org>
AuthorDate:    Mon, 17 Mar 2025 23:18:24 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Wed, 19 Mar 2025 11:19:28 +01:00

x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

Use u32 instead of uint32_t in hypervisor_cpuid_base().

Yes, uint32_t is used in Xen code et al, but this is a core x86
architecture header and we should standardize on the type that
is being used overwhelmingly in related x86 architecture code.

The two types are the same so there should be no build warnings.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250317221824.3738853-6-mingo@kernel.org
---
 arch/x86/include/asm/cpuid/api.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index 356db18..9c180c9 100644
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -187,9 +187,9 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)
 #define for_each_possible_hypervisor_cpuid_base(function) \
 	for (function = 0x40000000; function < 0x40010000; function += 0x100)
 
-static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
+static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
 {
-	uint32_t base, eax, signature[3];
+	u32 base, eax, signature[3];
 
 	for_each_possible_hypervisor_cpuid_base(base) {
 		cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[H. Peter Anvin]

On March 17, 2025 3:18:19 PM PDT, Ingo Molnar <mingo@kernel.org> wrote:
>This series contains Ahmed S. Darwish's splitting up of <asm/cpuid.h>
>into <asm/cpuid/types.h> and <asm/cpuid/api.h>, followed by a couple
>of cleanups that create a more maintainable base.
>
>Thanks,
>
>	Ingo
>
>================>
>Ahmed S. Darwish (1):
>  x86/cpuid: Refactor <asm/cpuid.h>
>
>Ingo Molnar (4):
>  x86/cpuid: Clean up <asm/cpuid/types.h>
>  x86/cpuid: Clean up <asm/cpuid/api.h>
>  x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>
>  x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>
>
> arch/x86/include/asm/cpuid.h       | 217 +--------------------------------------------------------
> arch/x86/include/asm/cpuid/api.h   | 210 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
> arch/x86/include/asm/cpuid/types.h |  32 +++++++++
> 3 files changed, 243 insertions(+), 216 deletions(-)
> create mode 100644 arch/x86/include/asm/cpuid/api.h
> create mode 100644 arch/x86/include/asm/cpuid/types.h
>

It would be nice to get rid of the bleacherous use of *eax and *ecx as input-output operands. The use of four separate pointers is just barely tolerable because the compiler can remove them when the asm is inlined.

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Ingo Molnar]

* H. Peter Anvin <hpa@zytor.com> wrote:

> It would be nice to get rid of the bleacherous use of *eax and *ecx 
> as input-output operands. The use of four separate pointers is just 
> barely tolerable because the compiler can remove them when the asm is 
> inlined.

So we have a nice structure of:

 struct cpuid_regs {
         u32 eax;
         u32 ebx;
         u32 ecx;
         u32 edx;
 };

So instead of:

 static inline void cpuid_count(unsigned int op, int count,
                               unsigned int *eax, unsigned int *ebx,
                               unsigned int *ecx, unsigned int *edx)

... we could have:

 static inline void cpuid_count(unsigned int op, int count, struct cpuid_regs *cregs)

or so?

plus we could implement the main CPUID call as:

 static inline void native_cpuid(struct cpuid_regs *cregs)
 {
        /* ecx is often an input as well as an output. */
        asm volatile("cpuid"
            : "=a" (cregs->eax),
              "=b" (cregs->ebx),
              "=c" (cregs->ecx),
              "=d" (cregs->edx)
            : "0" (cregs->eax), "2" (cregs->ecx)
            : "memory");
 }

and thus we give the asm() statement only a single pointer in essence, 
'cregs'?

Or do you mean something else?

Thanks,

	Ingo

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Linus Torvalds]

On Tue, 18 Mar 2025 at 11:04, Ingo Molnar <mingo@kernel.org> wrote:
>
> plus we could implement the main CPUID call as:
>
>  static inline void native_cpuid(struct cpuid_regs *cregs)
>  {
>         /* ecx is often an input as well as an output. */
>         asm volatile("cpuid"

So this really needs "asm inline" now. Because if it's not inlined, it
generates horrific code.

Anyway, I agree with whoever (hpa?) said we should probably just
unconditionally make all "asm" be "__asm__ __inline__" .

And then *if* there are any places that want to out-line the asm (why
would you do that? At that point you'd be better off just writing
assembler!), they could use an explicit __asm__ instead with a
comment.

Sadly, I think doing just a mindless

    #define asm(...) __asm__ __inline__(__VA_ARGS__)

doesn't work, because we also have

        register void *tos asm("r11");

kind of patterns.

So first we'd have to change those to use __asm__(), and *then* we
could do the "asm() is always __asm__ __inline__()" thing.

             Linus

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Ingo Molnar]

* Linus Torvalds <torvalds@linux-foundation.org> wrote:

> On Tue, 18 Mar 2025 at 11:04, Ingo Molnar <mingo@kernel.org> wrote:
> >
> > plus we could implement the main CPUID call as:
> >
> >  static inline void native_cpuid(struct cpuid_regs *cregs)
> >  {
> >         /* ecx is often an input as well as an output. */
> >         asm volatile("cpuid"
> 
> So this really needs "asm inline" now. Because if it's not inlined, it
> generates horrific code.
> 
> Anyway, I agree with whoever (hpa?) said we should probably just
> unconditionally make all "asm" be "__asm__ __inline__" .

Yeah, it was hpa, and I was thinking about that approach today, and was 
about to write a "don't want to do such a big binary change without 
Linus's buy-in" reply ...

... and problem solved. ;-)

> And then *if* there are any places that want to out-line the asm (why 
> would you do that? At that point you'd be better off just writing 
> assembler!), they could use an explicit __asm__ instead with a 
> comment.
> 
> Sadly, I think doing just a mindless
> 
>     #define asm(...) __asm__ __inline__(__VA_ARGS__)
> 
> doesn't work, because we also have
> 
>         register void *tos asm("r11");
> 
> kind of patterns.
> 
> So first we'd have to change those to use __asm__(), and *then* we
> could do the "asm() is always __asm__ __inline__()" thing.

Yeah, I'll try this out. Should this be done for all architectures, or 
just for x86 for the time being?

I'm not sure an arch opt-in is worth it, it will only end up in the 
active architectures picking it, but none of the others, and we'll live 
with the duality forever.

Thanks,

	Ingo

[PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Ingo Molnar]

* Ingo Molnar <mingo@kernel.org> wrote:

> > And then *if* there are any places that want to out-line the asm 
> > (why would you do that? At that point you'd be better off just 
> > writing assembler!), they could use an explicit __asm__ instead 
> > with a comment.
> > 
> > Sadly, I think doing just a mindless
> > 
> >     #define asm(...) __asm__ __inline__(__VA_ARGS__)
> > 
> > doesn't work, because we also have
> > 
> >         register void *tos asm("r11");
> > 
> > kind of patterns.

Plus we also have a lot of plain asm() statements in .c files in file 
scope that GCC doesn't accept with an __inline keyword:

    CC      kernel/configs.o
  kernel/configs.c:23:5: error: expected ‘(’ before ‘__inline’
     23 | asm __inline (
        |     ^~~~~~~~
        |     (
  make[3]: *** [scripts/Makefile.build:207: kernel/configs.o] Error 1

Because allowing that would have been way too simple. :-/

And a lot of helper macros that are used in such a scope are affected 
as well.

> > So first we'd have to change those to use __asm__(), and *then* we
> > could do the "asm() is always __asm__ __inline__()" thing.
> 
> Yeah, I'll try this out. Should this be done for all architectures, 
> or just for x86 for the time being?
> 
> I'm not sure an arch opt-in is worth it, it will only end up in the 
> active architectures picking it, but none of the others, and we'll 
> live with the duality forever.

So the attached patch builds on x86-[64|32]{defconfig|allmodconfig}
and boots on x86-64 defconfig.

The central part is:

 /* Make regular asm() templates inline too, on compilers that support it: */
 
 #ifdef CONFIG_CC_HAS_ASM_INLINE
 # define asm_inline __asm__ __inline
 # define asm(...) asm_inline(__VA_ARGS__)
 #else
 # define asm_inline asm
 #endif

And I fixed up the places where this isn't syntactically correct:

 35 files changed, 82 insertions(+), 79 deletions(-)

I haven't looked at code generation much yet, but text size changes are 
minimal:

      text	   data	    bss	     dec	    hex	filename
  29429076	7931870	1401196	38762142	24f769e	vmlinux.before
  29429631	7931870	1401200	38762701	24f78cd	vmlinux.after

Which is promising, assuming I haven't messed up anywhere.

Tested on GCC 14.2.0.

... and obviously this will break the build on all other architectures 
that have CONFIG_CC_HAS_ASM_INLINE, given that two dozen files had to 
be fixed on x86 alone.

Thanks,

	Ingo

===============>
From: Ingo Molnar <mingo@kernel.org>
Date: Tue, 18 Mar 2025 20:32:13 +0100
Subject: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

Not-Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/coco/sev/shared.c                  | 10 +++++-----
 arch/x86/crypto/curve25519-x86_64.c         |  2 +-
 arch/x86/include/asm/alternative.h          |  2 +-
 arch/x86/include/asm/asm.h                  |  2 +-
 arch/x86/include/asm/cfi.h                  |  2 +-
 arch/x86/include/asm/irq_stack.h            |  2 +-
 arch/x86/include/asm/linkage.h              |  2 +-
 arch/x86/include/asm/paravirt.h             |  2 +-
 arch/x86/include/asm/static_call.h          |  4 ++--
 arch/x86/include/asm/uaccess.h              |  4 ++--
 arch/x86/include/asm/xen/hypercall.h        | 12 ++++++------
 arch/x86/kernel/alternative.c               |  6 +++---
 arch/x86/kernel/callthunks.c                |  2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c   |  6 +++---
 arch/x86/kernel/kprobes/opt.c               |  2 +-
 arch/x86/kernel/rethook.c                   |  2 +-
 arch/x86/kernel/static_call.c               |  2 +-
 arch/x86/kernel/uprobes.c                   |  2 +-
 arch/x86/kvm/emulate.c                      |  4 ++--
 arch/x86/lib/error-inject.c                 |  2 +-
 include/linux/compiler_types.h              |  7 +++++--
 include/linux/export-internal.h             |  4 ++--
 include/linux/export.h                      |  2 +-
 include/linux/init.h                        |  2 +-
 include/linux/linkage.h                     |  4 ++--
 include/linux/pci.h                         |  2 +-
 include/linux/tracepoint.h                  |  2 +-
 include/vdso/math64.h                       |  2 +-
 kernel/configs.c                            |  2 +-
 kernel/kheaders.c                           |  2 +-
 samples/ftrace/ftrace-direct-modify.c       | 12 ++++++------
 samples/ftrace/ftrace-direct-multi-modify.c | 12 ++++++------
 samples/ftrace/ftrace-direct-multi.c        | 12 ++++++------
 samples/ftrace/ftrace-direct-too.c          | 12 ++++++------
 samples/ftrace/ftrace-direct.c              | 12 ++++++------
 35 files changed, 82 insertions(+), 79 deletions(-)

diff --git a/arch/x86/coco/sev/shared.c b/arch/x86/coco/sev/shared.c
index 2e4122f8aa6b..ac8b898e1d26 100644
--- a/arch/x86/coco/sev/shared.c
+++ b/arch/x86/coco/sev/shared.c
@@ -281,11 +281,11 @@ static inline int svsm_process_result_codes(struct svsm_call *call)
  */
 static __always_inline void svsm_issue_call(struct svsm_call *call, u8 *pending)
 {
-	register unsigned long rax asm("rax") = call->rax;
-	register unsigned long rcx asm("rcx") = call->rcx;
-	register unsigned long rdx asm("rdx") = call->rdx;
-	register unsigned long r8  asm("r8")  = call->r8;
-	register unsigned long r9  asm("r9")  = call->r9;
+	register unsigned long rax __asm__("rax") = call->rax;
+	register unsigned long rcx __asm__("rcx") = call->rcx;
+	register unsigned long rdx __asm__("rdx") = call->rdx;
+	register unsigned long r8  __asm__("r8")  = call->r8;
+	register unsigned long r9  __asm__("r9")  = call->r9;
 
 	call->caa->call_pending = 1;
 
diff --git a/arch/x86/crypto/curve25519-x86_64.c b/arch/x86/crypto/curve25519-x86_64.c
index dcfc0de333de..7d664bc8b2fd 100644
--- a/arch/x86/crypto/curve25519-x86_64.c
+++ b/arch/x86/crypto/curve25519-x86_64.c
@@ -542,7 +542,7 @@ static inline void fmul2(u64 *out, const u64 *f1, const u64 *f2, u64 *tmp)
  * Requires f2 to be smaller than 2^17 */
 static inline void fmul_scalar(u64 *out, const u64 *f1, u64 f2)
 {
-	register u64 f2_r asm("rdx") = f2;
+	register u64 f2_r __asm__("rdx") = f2;
 
 	asm volatile(
 		/* Compute the raw multiplication of f1*f2 */
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index e3903b731305..ab6c80eaf7f5 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -272,7 +272,7 @@ static inline int alternatives_text_reserved(void *start, void *end)
 
 /* Macro for creating assembler functions avoiding any C magic. */
 #define DEFINE_ASM_FUNC(func, instr, sec)		\
-	asm (".pushsection " #sec ", \"ax\"\n"		\
+	__asm__ (".pushsection " #sec ", \"ax\"\n"	\
 	     ".global " #func "\n\t"			\
 	     ".type " #func ", @function\n\t"		\
 	     ASM_FUNC_ALIGN "\n"			\
diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h
index 2bec0c89a95c..5b88c875d512 100644
--- a/arch/x86/include/asm/asm.h
+++ b/arch/x86/include/asm/asm.h
@@ -219,7 +219,7 @@ static __always_inline __pure void *rip_rel_ptr(void *p)
  * gets set up by the containing function.  If you forget to do this, objtool
  * may print a "call without frame pointer save/setup" warning.
  */
-register unsigned long current_stack_pointer asm(_ASM_SP);
+register unsigned long current_stack_pointer __asm__(_ASM_SP);
 #define ASM_CALL_CONSTRAINT "+r" (current_stack_pointer)
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/x86/include/asm/cfi.h b/arch/x86/include/asm/cfi.h
index 31d19c815f99..5fd236a9ac25 100644
--- a/arch/x86/include/asm/cfi.h
+++ b/arch/x86/include/asm/cfi.h
@@ -140,7 +140,7 @@ static inline u32 cfi_get_func_hash(void *func)
 #endif /* CONFIG_CFI_CLANG */
 
 #if HAS_KERNEL_IBT == 1
-#define CFI_NOSEAL(x)	asm(IBT_NOSEAL(__stringify(x)))
+#define CFI_NOSEAL(x)	__asm__(IBT_NOSEAL(__stringify(x)))
 #endif
 
 #endif /* _ASM_X86_CFI_H */
diff --git a/arch/x86/include/asm/irq_stack.h b/arch/x86/include/asm/irq_stack.h
index 562a547c29a5..478291297ff2 100644
--- a/arch/x86/include/asm/irq_stack.h
+++ b/arch/x86/include/asm/irq_stack.h
@@ -80,7 +80,7 @@
  */
 #define call_on_stack(stack, func, asm_call, argconstr...)		\
 {									\
-	register void *tos asm("r11");					\
+	register void *tos __asm__("r11");				\
 									\
 	tos = ((void *)(stack));					\
 									\
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h
index dc31b13b87a0..8753b9f2e473 100644
--- a/arch/x86/include/asm/linkage.h
+++ b/arch/x86/include/asm/linkage.h
@@ -13,7 +13,7 @@
  * The generic version tends to create spurious ENDBR instructions under
  * certain conditions.
  */
-#define _THIS_IP_ ({ unsigned long __here; asm ("lea 0(%%rip), %0" : "=r" (__here)); __here; })
+#define _THIS_IP_ ({ unsigned long __here; __asm__ ("lea 0(%%rip), %0" : "=r" (__here)); __here; })
 #endif
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 041aff51eb50..7090d1478982 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -648,7 +648,7 @@ bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
 #define __PV_CALLEE_SAVE_REGS_THUNK(func, section)			\
 	extern typeof(func) __raw_callee_save_##func;			\
 									\
-	asm(".pushsection " section ", \"ax\";"				\
+	__asm__(".pushsection " section ", \"ax\";"			\
 	    ".globl " PV_THUNK_NAME(func) ";"				\
 	    ".type " PV_THUNK_NAME(func) ", @function;"			\
 	    ASM_FUNC_ALIGN						\
diff --git a/arch/x86/include/asm/static_call.h b/arch/x86/include/asm/static_call.h
index 41502bd2afd6..23e6dca3dc63 100644
--- a/arch/x86/include/asm/static_call.h
+++ b/arch/x86/include/asm/static_call.h
@@ -32,7 +32,7 @@
  * and __static_call_fixup().
  */
 #define __ARCH_DEFINE_STATIC_CALL_TRAMP(name, insns)			\
-	asm(".pushsection .static_call.text, \"ax\"		\n"	\
+	__asm__(".pushsection .static_call.text, \"ax\"		\n"	\
 	    ".align 4						\n"	\
 	    ".globl " STATIC_CALL_TRAMP_STR(name) "		\n"	\
 	    STATIC_CALL_TRAMP_STR(name) ":			\n"	\
@@ -58,7 +58,7 @@
 	ARCH_DEFINE_STATIC_CALL_TRAMP(name, __static_call_return0)
 
 #define ARCH_ADD_TRAMP_KEY(name)					\
-	asm(".pushsection .static_call_tramp_key, \"a\"		\n"	\
+	__asm__(".pushsection .static_call_tramp_key, \"a\"	\n"	\
 	    ".long " STATIC_CALL_TRAMP_STR(name) " - .		\n"	\
 	    ".long " STATIC_CALL_KEY_STR(name) " - .		\n"	\
 	    ".popsection					\n")
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 3a7755c1a441..32715343ebb1 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -76,7 +76,7 @@ extern int __get_user_bad(void);
 #define do_get_user_call(fn,x,ptr)					\
 ({									\
 	int __ret_gu;							\
-	register __inttype(*(ptr)) __val_gu asm("%"_ASM_DX);		\
+	register __inttype(*(ptr)) __val_gu __asm__("%"_ASM_DX);	\
 	__chk_user_ptr(ptr);						\
 	asm volatile("call __" #fn "_%c[size]"				\
 		     : "=a" (__ret_gu), "=r" (__val_gu),		\
@@ -171,7 +171,7 @@ extern void __put_user_nocheck_8(void);
 ({									\
 	int __ret_pu;							\
 	void __user *__ptr_pu;						\
-	register __typeof__(*(ptr)) __val_pu asm("%"_ASM_AX);		\
+	register __typeof__(*(ptr)) __val_pu __asm__("%"_ASM_AX);	\
 	__typeof__(*(ptr)) __x = (x); /* eval x once */			\
 	__typeof__(ptr) __ptr = (ptr); /* eval ptr once */		\
 	__chk_user_ptr(__ptr);						\
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 97771b9d33af..0ecce35f287f 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -120,12 +120,12 @@ DECLARE_STATIC_CALL(xen_hypercall, xen_hypercall_func);
 #endif
 
 #define __HYPERCALL_DECLS						\
-	register unsigned long __res  asm(__HYPERCALL_RETREG);		\
-	register unsigned long __arg1 asm(__HYPERCALL_ARG1REG) = __arg1; \
-	register unsigned long __arg2 asm(__HYPERCALL_ARG2REG) = __arg2; \
-	register unsigned long __arg3 asm(__HYPERCALL_ARG3REG) = __arg3; \
-	register unsigned long __arg4 asm(__HYPERCALL_ARG4REG) = __arg4; \
-	register unsigned long __arg5 asm(__HYPERCALL_ARG5REG) = __arg5;
+	register unsigned long __res  __asm__(__HYPERCALL_RETREG);		\
+	register unsigned long __arg1 __asm__(__HYPERCALL_ARG1REG) = __arg1; \
+	register unsigned long __arg2 __asm__(__HYPERCALL_ARG2REG) = __arg2; \
+	register unsigned long __arg3 __asm__(__HYPERCALL_ARG3REG) = __arg3; \
+	register unsigned long __arg4 __asm__(__HYPERCALL_ARG4REG) = __arg4; \
+	register unsigned long __arg5 __asm__(__HYPERCALL_ARG5REG) = __arg5;
 
 #define __HYPERCALL_0PARAM	"=r" (__res), ASM_CALL_CONSTRAINT
 #define __HYPERCALL_1PARAM	__HYPERCALL_0PARAM, "+r" (__arg1)
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index c71b575bf229..cde99c0e2502 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -942,7 +942,7 @@ extern unsigned int __bpf_prog_runX(const void *ctx,
 __ADDRESSABLE(__bpf_prog_runX);
 
 /* u32 __ro_after_init cfi_bpf_hash = __kcfi_typeid___bpf_prog_runX; */
-asm (
+__asm__ (
 "	.pushsection	.data..ro_after_init,\"aw\",@progbits	\n"
 "	.type	cfi_bpf_hash,@object				\n"
 "	.globl	cfi_bpf_hash					\n"
@@ -959,7 +959,7 @@ extern u64 __bpf_callback_fn(u64, u64, u64, u64, u64);
 __ADDRESSABLE(__bpf_callback_fn);
 
 /* u32 __ro_after_init cfi_bpf_subprog_hash = __kcfi_typeid___bpf_callback_fn; */
-asm (
+__asm__ (
 "	.pushsection	.data..ro_after_init,\"aw\",@progbits	\n"
 "	.type	cfi_bpf_subprog_hash,@object			\n"
 "	.globl	cfi_bpf_subprog_hash				\n"
@@ -1598,7 +1598,7 @@ int alternatives_text_reserved(void *start, void *end)
 
 extern void int3_magic(unsigned int *ptr); /* defined in asm */
 
-asm (
+__asm__ (
 "	.pushsection	.init.text, \"ax\", @progbits\n"
 "	.type		int3_magic, @function\n"
 "int3_magic:\n"
diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c
index 8418a892d195..5d865c851b4f 100644
--- a/arch/x86/kernel/callthunks.c
+++ b/arch/x86/kernel/callthunks.c
@@ -64,7 +64,7 @@ static const struct core_text builtin_coretext = {
 	.name = "builtin",
 };
 
-asm (
+__asm__ (
 	".pushsection .rodata				\n"
 	".global skl_call_thunk_template		\n"
 	"skl_call_thunk_template:			\n"
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 42cc162f7fc9..49381dc69837 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -446,9 +446,9 @@ static int pseudo_lock_fn(void *_rdtgrp)
 	unsigned int size;
 	void *mem_r;
 #else
-	register unsigned int line_size asm("esi");
-	register unsigned int size asm("edi");
-	register void *mem_r asm(_ASM_BX);
+	register unsigned int line_size __asm__("esi");
+	register unsigned int size __asm__("edi");
+	register void *mem_r __asm__(_ASM_BX);
 #endif /* CONFIG_KASAN */
 
 	/*
diff --git a/arch/x86/kernel/kprobes/opt.c b/arch/x86/kernel/kprobes/opt.c
index 36d6809c6c9e..eb394142a3b3 100644
--- a/arch/x86/kernel/kprobes/opt.c
+++ b/arch/x86/kernel/kprobes/opt.c
@@ -101,7 +101,7 @@ static void synthesize_set_arg1(kprobe_opcode_t *addr, unsigned long val)
 	*(unsigned long *)addr = val;
 }
 
-asm (
+__asm__ (
 			".pushsection .rodata\n"
 			"optprobe_template_func:\n"
 			".global optprobe_template_entry\n"
diff --git a/arch/x86/kernel/rethook.c b/arch/x86/kernel/rethook.c
index 8a1c0111ae79..bb3ebb6c7618 100644
--- a/arch/x86/kernel/rethook.c
+++ b/arch/x86/kernel/rethook.c
@@ -19,7 +19,7 @@ __visible void arch_rethook_trampoline_callback(struct pt_regs *regs);
  * When a target function returns, this code saves registers and calls
  * arch_rethook_trampoline_callback(), which calls the rethook handler.
  */
-asm(
+__asm__(
 	".text\n"
 	".global arch_rethook_trampoline\n"
 	".type arch_rethook_trampoline, @function\n"
diff --git a/arch/x86/kernel/static_call.c b/arch/x86/kernel/static_call.c
index 9e51242ed125..13984965b8a7 100644
--- a/arch/x86/kernel/static_call.c
+++ b/arch/x86/kernel/static_call.c
@@ -41,7 +41,7 @@ static u8 __is_Jcc(u8 *insn) /* Jcc.d32 */
 
 extern void __static_call_return(void);
 
-asm (".global __static_call_return\n\t"
+__asm__ (".global __static_call_return\n\t"
      ".type __static_call_return, @function\n\t"
      ASM_FUNC_ALIGN "\n\t"
      "__static_call_return:\n\t"
diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c
index 5a952c5ea66b..2a56d8313cbb 100644
--- a/arch/x86/kernel/uprobes.c
+++ b/arch/x86/kernel/uprobes.c
@@ -310,7 +310,7 @@ static int uprobe_init_insn(struct arch_uprobe *auprobe, struct insn *insn, bool
 
 #ifdef CONFIG_X86_64
 
-asm (
+__asm__ (
 	".pushsection .rodata\n"
 	".global uretprobe_trampoline_entry\n"
 	"uretprobe_trampoline_entry:\n"
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 60986f67c35a..80800901474d 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -311,7 +311,7 @@ static int fastop(struct x86_emulate_ctxt *ctxt, fastop_t fop);
 
 #define __FOP_START(op, align) \
 	extern void em_##op(struct fastop *fake); \
-	asm(".pushsection .text, \"ax\" \n\t" \
+	__asm__(".pushsection .text, \"ax\" \n\t" \
 	    ".global em_" #op " \n\t" \
 	    ".align " __stringify(align) " \n\t" \
 	    "em_" #op ":\n\t"
@@ -1069,7 +1069,7 @@ static __always_inline u8 test_cc(unsigned int condition, unsigned long flags)
 	void (*fop)(void) = (void *)em_setcc + FASTOP_SIZE * (condition & 0xf);
 
 	flags = (flags & EFLAGS_MASK) | X86_EFLAGS_IF;
-	asm("push %[flags]; popf; " CALL_NOSPEC
+	__asm__("push %[flags]; popf; " CALL_NOSPEC
 	    : "=a"(rc), ASM_CALL_CONSTRAINT : [thunk_target]"r"(fop), [flags]"r"(flags));
 	return rc;
 }
diff --git a/arch/x86/lib/error-inject.c b/arch/x86/lib/error-inject.c
index b5a6d83106bc..0fd65281078c 100644
--- a/arch/x86/lib/error-inject.c
+++ b/arch/x86/lib/error-inject.c
@@ -7,7 +7,7 @@
 
 asmlinkage void just_return_func(void);
 
-asm(
+__asm__(
 	".text\n"
 	".type just_return_func, @function\n"
 	".globl just_return_func\n"
diff --git a/include/linux/compiler_types.h b/include/linux/compiler_types.h
index 981cc3d7e3aa..4c59faf2c22f 100644
--- a/include/linux/compiler_types.h
+++ b/include/linux/compiler_types.h
@@ -473,10 +473,13 @@ struct ftrace_likely_data {
   #define ASM_INPUT_RM "rm"
 #endif
 
+/* Make regular asm() templates inline too, on compilers that support it: */
+
 #ifdef CONFIG_CC_HAS_ASM_INLINE
-#define asm_inline asm __inline
+# define asm_inline __asm__ __inline
+# define asm(...) asm_inline(__VA_ARGS__)
 #else
-#define asm_inline asm
+# define asm_inline asm
 #endif
 
 /* Are two types/vars the same type (ignoring qualifiers)? */
diff --git a/include/linux/export-internal.h b/include/linux/export-internal.h
index d445705ac13c..61dfbc986c9a 100644
--- a/include/linux/export-internal.h
+++ b/include/linux/export-internal.h
@@ -38,7 +38,7 @@
  * former apparently works on all arches according to the binutils source.
  */
 #define __KSYMTAB(name, sym, sec, ns)						\
-	asm("	.section \"__ksymtab_strings\",\"aMS\",%progbits,1"	"\n"	\
+	__asm__("	.section \"__ksymtab_strings\",\"aMS\",%progbits,1"	"\n"	\
 	    "__kstrtab_" #name ":"					"\n"	\
 	    "	.asciz \"" #name "\""					"\n"	\
 	    "__kstrtabns_" #name ":"					"\n"	\
@@ -63,7 +63,7 @@
 #define KSYMTAB_DATA(name, sec, ns)	__KSYMTAB(name, name, sec, ns)
 
 #define SYMBOL_CRC(sym, crc, sec)   \
-	asm(".section \"___kcrctab" sec "+" #sym "\",\"a\""	"\n" \
+	__asm__(".section \"___kcrctab" sec "+" #sym "\",\"a\""	"\n" \
 	    ".balign 4"						"\n" \
 	    "__crc_" #sym ":"					"\n" \
 	    ".long " #crc					"\n" \
diff --git a/include/linux/export.h b/include/linux/export.h
index a8c23d945634..ca2fc2cc5db8 100644
--- a/include/linux/export.h
+++ b/include/linux/export.h
@@ -70,7 +70,7 @@
 	extern typeof(sym) sym;					\
 	__ADDRESSABLE(sym)					\
 	__GENDWARFKSYMS_EXPORT(sym)				\
-	asm(__stringify(___EXPORT_SYMBOL(sym, license, ns)))
+	__asm__(__stringify(___EXPORT_SYMBOL(sym, license, ns)))
 
 #endif
 
diff --git a/include/linux/init.h b/include/linux/init.h
index ee1309473bc6..85bc49b7e34d 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -259,7 +259,7 @@ extern struct module __this_module;
 #ifdef CONFIG_HAVE_ARCH_PREL32_RELOCATIONS
 #define ____define_initcall(fn, __stub, __name, __sec)		\
 	__define_initcall_stub(__stub, fn)			\
-	asm(".section	\"" __sec "\", \"a\"		\n"	\
+	__asm__(".section	\"" __sec "\", \"a\"	\n"	\
 	    __stringify(__name) ":			\n"	\
 	    ".long	" __stringify(__stub) " - .	\n"	\
 	    ".previous					\n");	\
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index 5c8865bb59d9..74bc0c88f8ca 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -23,14 +23,14 @@
 #endif
 
 #ifndef cond_syscall
-#define cond_syscall(x)	asm(				\
+#define cond_syscall(x)	__asm__(			\
 	".weak " __stringify(x) "\n\t"			\
 	".set  " __stringify(x) ","			\
 		 __stringify(sys_ni_syscall))
 #endif
 
 #ifndef SYSCALL_ALIAS
-#define SYSCALL_ALIAS(alias, name) asm(			\
+#define SYSCALL_ALIAS(alias, name) __asm__(		\
 	".globl " __stringify(alias) "\n\t"		\
 	".set   " __stringify(alias) ","		\
 		  __stringify(name))
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 47b31ad724fa..0904d24c9e17 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -2206,7 +2206,7 @@ enum pci_fixup_pass {
 #define ___DECLARE_PCI_FIXUP_SECTION(sec, name, vendor, device, class,	\
 				    class_shift, hook)			\
 	__ADDRESSABLE(hook)						\
-	asm(".section "	#sec ", \"a\"				\n"	\
+	__asm__(".section "	#sec ", \"a\"			\n"	\
 	    ".balign	16					\n"	\
 	    ".short "	#vendor ", " #device "			\n"	\
 	    ".long "	#class ", " #class_shift "		\n"	\
diff --git a/include/linux/tracepoint.h b/include/linux/tracepoint.h
index a351763e6965..4f0f7cca7a62 100644
--- a/include/linux/tracepoint.h
+++ b/include/linux/tracepoint.h
@@ -149,7 +149,7 @@ static inline struct tracepoint *tracepoint_ptr_deref(tracepoint_ptr_t *p)
 }
 
 #define __TRACEPOINT_ENTRY(name)					\
-	asm("	.section \"__tracepoints_ptrs\", \"a\"		\n"	\
+	__asm__("	.section \"__tracepoints_ptrs\", \"a\"	\n"	\
 	    "	.balign 4					\n"	\
 	    "	.long 	__tracepoint_" #name " - .		\n"	\
 	    "	.previous					\n")
diff --git a/include/vdso/math64.h b/include/vdso/math64.h
index 22ae212f8b28..d391d9622414 100644
--- a/include/vdso/math64.h
+++ b/include/vdso/math64.h
@@ -10,7 +10,7 @@ __iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remainder)
 	while (dividend >= divisor) {
 		/* The following asm() prevents the compiler from
 		   optimising this loop into a modulo operation.  */
-		asm("" : "+rm"(dividend));
+		__asm__("" : "+rm"(dividend));
 
 		dividend -= divisor;
 		ret++;
diff --git a/kernel/configs.c b/kernel/configs.c
index a28c79c5f713..076342773995 100644
--- a/kernel/configs.c
+++ b/kernel/configs.c
@@ -20,7 +20,7 @@
  * "IKCFG_ST" and "IKCFG_ED" are used to extract the config data from
  * a binary kernel image or a module. See scripts/extract-ikconfig.
  */
-asm (
+__asm__ (
 "	.pushsection .rodata, \"a\"		\n"
 "	.ascii \"IKCFG_ST\"			\n"
 "	.global kernel_config_data		\n"
diff --git a/kernel/kheaders.c b/kernel/kheaders.c
index 378088b07f46..1468c46806a3 100644
--- a/kernel/kheaders.c
+++ b/kernel/kheaders.c
@@ -16,7 +16,7 @@
  * compressed kernel headers are stored. The file is first compressed with xz.
  */
 
-asm (
+__asm__ (
 "	.pushsection .rodata, \"a\"		\n"
 "	.global kernel_headers_data		\n"
 "kernel_headers_data:				\n"
diff --git a/samples/ftrace/ftrace-direct-modify.c b/samples/ftrace/ftrace-direct-modify.c
index cfea7a38befb..a59d68845a58 100644
--- a/samples/ftrace/ftrace-direct-modify.c
+++ b/samples/ftrace/ftrace-direct-modify.c
@@ -27,7 +27,7 @@ static unsigned long my_ip = (unsigned long)schedule;
 #ifdef CONFIG_RISCV
 #include <asm/asm.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -64,7 +64,7 @@ asm (
 #include <asm/ibt.h>
 #include <asm/nospec-branch.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -96,7 +96,7 @@ asm (
 
 #ifdef CONFIG_S390
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -135,7 +135,7 @@ asm (
 
 #ifdef CONFIG_ARM64
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -167,7 +167,7 @@ asm (
 
 #ifdef CONFIG_LOONGARCH
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -239,7 +239,7 @@ asm (
 "	bctr\n"
 #endif
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
diff --git a/samples/ftrace/ftrace-direct-multi-modify.c b/samples/ftrace/ftrace-direct-multi-modify.c
index 8f7986d698d8..0f45e47e5137 100644
--- a/samples/ftrace/ftrace-direct-multi-modify.c
+++ b/samples/ftrace/ftrace-direct-multi-modify.c
@@ -25,7 +25,7 @@ extern void my_tramp2(void *);
 #ifdef CONFIG_RISCV
 #include <asm/asm.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -68,7 +68,7 @@ asm (
 #include <asm/ibt.h>
 #include <asm/nospec-branch.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -106,7 +106,7 @@ asm (
 
 #ifdef CONFIG_S390
 
-asm (
+__asm__ (
 "       .pushsection    .text, \"ax\", @progbits\n"
 "       .type           my_tramp1, @function\n"
 "       .globl          my_tramp1\n"
@@ -148,7 +148,7 @@ asm (
 
 #ifdef CONFIG_ARM64
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -187,7 +187,7 @@ asm (
 #ifdef CONFIG_LOONGARCH
 #include <asm/asm.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
@@ -273,7 +273,7 @@ asm (
 #define PPC_FTRACE_RECOVER_IP ""
 #endif
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp1, @function\n"
 "	.globl		my_tramp1\n"
diff --git a/samples/ftrace/ftrace-direct-multi.c b/samples/ftrace/ftrace-direct-multi.c
index db326c81a27d..c687682780fa 100644
--- a/samples/ftrace/ftrace-direct-multi.c
+++ b/samples/ftrace/ftrace-direct-multi.c
@@ -20,7 +20,7 @@ extern void my_tramp(void *);
 #ifdef CONFIG_RISCV
 #include <asm/asm.h>
 
-asm (
+__asm__ (
 "       .pushsection    .text, \"ax\", @progbits\n"
 "       .type           my_tramp, @function\n"
 "       .globl          my_tramp\n"
@@ -47,7 +47,7 @@ asm (
 #include <asm/ibt.h>
 #include <asm/nospec-branch.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -70,7 +70,7 @@ asm (
 
 #ifdef CONFIG_S390
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -95,7 +95,7 @@ asm (
 
 #ifdef CONFIG_ARM64
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -119,7 +119,7 @@ asm (
 #ifdef CONFIG_LOONGARCH
 
 #include <asm/asm.h>
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -189,7 +189,7 @@ asm (
 #define PPC_FTRACE_RECOVER_IP ""
 #endif
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
diff --git a/samples/ftrace/ftrace-direct-too.c b/samples/ftrace/ftrace-direct-too.c
index 3d0fa260332d..63b778b7285b 100644
--- a/samples/ftrace/ftrace-direct-too.c
+++ b/samples/ftrace/ftrace-direct-too.c
@@ -22,7 +22,7 @@ extern void my_tramp(void *);
 #ifdef CONFIG_RISCV
 #include <asm/asm.h>
 
-asm (
+__asm__ (
 "       .pushsection    .text, \"ax\", @progbits\n"
 "       .type           my_tramp, @function\n"
 "       .globl          my_tramp\n"
@@ -52,7 +52,7 @@ asm (
 #include <asm/ibt.h>
 #include <asm/nospec-branch.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -80,7 +80,7 @@ asm (
 
 #ifdef CONFIG_S390
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -104,7 +104,7 @@ asm (
 
 #ifdef CONFIG_ARM64
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -128,7 +128,7 @@ asm (
 
 #ifdef CONFIG_LOONGARCH
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -201,7 +201,7 @@ asm (
 "	bctr\n"
 #endif
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
diff --git a/samples/ftrace/ftrace-direct.c b/samples/ftrace/ftrace-direct.c
index 956834b0d19a..7ad16e5c4a5b 100644
--- a/samples/ftrace/ftrace-direct.c
+++ b/samples/ftrace/ftrace-direct.c
@@ -19,7 +19,7 @@ extern void my_tramp(void *);
 #ifdef CONFIG_RISCV
 #include <asm/asm.h>
 
-asm (
+__asm__ (
 "       .pushsection    .text, \"ax\", @progbits\n"
 "       .type           my_tramp, @function\n"
 "       .globl          my_tramp\n"
@@ -45,7 +45,7 @@ asm (
 #include <asm/ibt.h>
 #include <asm/nospec-branch.h>
 
-asm (
+__asm__ (
 "	.pushsection    .text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -67,7 +67,7 @@ asm (
 
 #ifdef CONFIG_S390
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -91,7 +91,7 @@ asm (
 
 #ifdef CONFIG_ARM64
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -113,7 +113,7 @@ asm (
 
 #ifdef CONFIG_LOONGARCH
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"
@@ -174,7 +174,7 @@ asm (
 "	bctr\n"
 #endif
 
-asm (
+__asm__ (
 "	.pushsection	.text, \"ax\", @progbits\n"
 "	.type		my_tramp, @function\n"
 "	.globl		my_tramp\n"

Re: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Josh Poimboeuf]

On Tue, Mar 18, 2025 at 09:11:40PM +0100, Ingo Molnar wrote:
>  #ifdef CONFIG_CC_HAS_ASM_INLINE
>  # define asm_inline __asm__ __inline
>  # define asm(...) asm_inline(__VA_ARGS__)
>  #else
>  # define asm_inline asm
>  #endif

Nice, I'd been wanting to do that for a while.

> And I fixed up the places where this isn't syntactically correct:
> 
>  35 files changed, 82 insertions(+), 79 deletions(-)
> 
> I haven't looked at code generation much yet, but text size changes are 
> minimal:
> 
>       text	   data	    bss	     dec	    hex	filename
>   29429076	7931870	1401196	38762142	24f769e	vmlinux.before
>   29429631	7931870	1401200	38762701	24f78cd	vmlinux.after
> 
> Which is promising, assuming I haven't messed up anywhere.

Unfortunately "size" can be misleading:

  - Inexplicably, "text" includes a lot of non-executable sections, many
    of which have sizes which are directly affected by actual .text
    changes.

  - CONFIG_MITIGATION_SRSO adds ~2MB padding between entry code and the
    rest of the runtime text, though this is not much of a concern for
    comparing apples to apples as it only hides the size of the entry
    text which is tiny.

This was discussed before (and yes "objtool size" would be nice
someday).

  https://lore.kernel.org/20231012013507.jrqnm35p7az6atov@treble

I think this should work decently enough:

  $ readelf -WS vmlinux | grep " .text" | sed 's/\[ //' | awk '{printf("0x%s\n", $6)}'
  0x5588b08

-- 
Josh

Re: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Uros Bizjak]

On Tue, Mar 18, 2025 at 9:11 PM Ingo Molnar <mingo@kernel.org> wrote:

>  #ifdef CONFIG_CC_HAS_ASM_INLINE
>  # define asm_inline __asm__ __inline
>  # define asm(...) asm_inline(__VA_ARGS__)
>  #else
>  # define asm_inline asm
>  #endif
>
> And I fixed up the places where this isn't syntactically correct:
>
>  35 files changed, 82 insertions(+), 79 deletions(-)
>
> I haven't looked at code generation much yet, but text size changes are
> minimal:
>
>       text         data     bss      dec            hex filename
>   29429076      7931870 1401196 38762142        24f769e vmlinux.before
>   29429631      7931870 1401200 38762701        24f78cd vmlinux.after
>
> Which is promising, assuming I haven't messed up anywhere.

Please use bloat-o-meter, it is more precise.

Actually, functions with the most impact (x86 locking functions and
__arch_hweight) were recently converted to asm_inline, so besides
__untagged_addr, the remaining have very little impact, if at all
(c.f. amd_clear_divider() ). There is also no need to convert asm()
without directives inside.

My proposal would be to convert the remaining few cases (the remaining
asms involving ALTERNATIVE and exceptions) "by hand" to asm_inline()
and stick a rule in checkpatch to use asm_inline() in the code
involving asm(), like we have the rule with asm volatile.

I don't think redefining an important C keyword is a good approach, it
obfuscates its meaning too much. And as has been shown by Ingo's
experiment, there is a substantial effort to fix false positives.
Instead of fixing these, we can trivially convert the remaining cases
to asm_volatile() as well, without obfuscating asm(). Checkpatch can
take care of future cases.

Thanks,
Uros.

Re: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Ingo Molnar]

* Uros Bizjak <ubizjak@gmail.com> wrote:

> On Tue, Mar 18, 2025 at 9:11 PM Ingo Molnar <mingo@kernel.org> wrote:
> 
> >  #ifdef CONFIG_CC_HAS_ASM_INLINE
> >  # define asm_inline __asm__ __inline
> >  # define asm(...) asm_inline(__VA_ARGS__)
> >  #else
> >  # define asm_inline asm
> >  #endif
> >
> > And I fixed up the places where this isn't syntactically correct:
> >
> >  35 files changed, 82 insertions(+), 79 deletions(-)
> >
> > I haven't looked at code generation much yet, but text size changes are
> > minimal:
> >
> >       text         data     bss      dec            hex filename
> >   29429076      7931870 1401196 38762142        24f769e vmlinux.before
> >   29429631      7931870 1401200 38762701        24f78cd vmlinux.after
> >
> > Which is promising, assuming I haven't messed up anywhere.
> 
> Please use bloat-o-meter, it is more precise.

Here's the bloat-o-meter output between vanilla and patched vmlinux:

add/remove: 6/20 grow/shrink: 43/13 up/down: 4245/-2812 (1433)
Function                                     old     new   delta
__ia32_sys_pidfd_send_signal                  21     818    +797
__x64_sys_pidfd_send_signal                   22     818    +796
nl80211_send_wiphy                         11189   11867    +678
icl_update_topdown_event                     473     691    +218
intel_joiner_adjust_timings.isra               -     145    +145
deactivate_locked_super                      148     249    +101
tcp_v4_send_synack                           301     389     +88
kill_anon_super                               53     137     +84
xa_destroy                                   291     371     +80
__xa_set_mark                                135     209     +74
ip_fraglist_prepare                          204     269     +65
store_hwp_dynamic_boost                      136     200     +64
csum_partial                                 239     302     +63
ip_fraglist_init                             155     217     +62
store_max_perf_pct                           252     311     +59
ip_frag_next                                 377     434     +57
ip_do_fragment                              1644    1701     +57
__ip_local_out                               283     340     +57
store_min_perf_pct                           273     329     +56
__udp4_lib_rcv                              2917    2970     +53
freeze_super                                1124    1175     +51
super_wake                                     -      47     +47
ieee80211_parse_tx_radiotap                 1267    1311     +44
ic_bootp_recv                               1333    1371     +38
vlv_compute_watermarks                      2267    2299     +32
intel_atomic_commit_tail                    5423    5455     +32
_g4x_compute_pipe_wm                         397     429     +32
__ieee80211_xmit_fast                       2611    2643     +32
intel_format_info_is_yuv_semiplanar           43      72     +29
skl_main_to_aux_plane                        113     136     +23
ip_auto_config                              4029    4050     +21
__memcpy_flushcache                          369     386     +17
validate_beacon_head                         240     256     +16
tcp_v4_rcv                                  4850    4866     +16
intel_enable_transcoder                     1443    1459     +16
intel_cx0pll_state_verify                   1859    1875     +16
intel_cx0_phy_check_hdmi_link_rate           181     197     +16
inet_gro_receive                             569     585     +16
__pfx_super_wake                               -      16     +16
__pfx_intel_joiner_adjust_timings.isra         -      16     +16
__pfx_intel_cx0_read.constprop                 -      16     +16
intel_fb_is_gen12_ccs_aux_plane.isra          95     107     +12
_intel_modeset_primary_pipes                  79      91     +12
intel_cx0_read.constprop                       -      10     +10
intel_fb_is_ccs_aux_plane                    110     117      +7
intel_crtc_readout_derived_state             513     516      +3
wq_update_node_max_active                    538     540      +2
intel_set_cdclk_pre_plane_update             838     840      +2
intel_sseu_subslice_total                     67      68      +1
intel_crtc_compute_config                    890     889      -1
_intel_modeset_secondary_pipes                50      47      -3
intel_mtl_pll_enable                        7472    7460     -12
bxt_set_cdclk                               1328    1316     -12
vfs_get_tree                                 205     189     -16
intel_fb_modifier_to_tiling                  186     170     -16
__pfx_nl80211_send_iftype_data                16       -     -16
__pfx_lane_mask_to_lane                       16       -     -16
__pfx_kill_super_notify.part                  16       -     -16
__pfx_ip_fast_csum                            16       -     -16
__pfx_intel_pstate_update_policies            16       -     -16
__pfx_intel_joiner_adjust_timings             16       -     -16
__pfx_format_is_yuv_semiplanar.part.isra      16       -     -16
__pfx_cdclk_divider                           16       -     -16
__pfx___icl_update_topdown_event              16       -     -16
__pfx___do_sys_pidfd_send_signal              16       -     -16
intel_c20_sram_read.constprop                173     149     -24
xas_split_alloc                              302     270     -32
nl80211_parse_sched_scan                    3311    3279     -32
kill_litter_super                             70      31     -39
format_is_yuv_semiplanar.part.isra            41       -     -41
lane_mask_to_lane                             44       -     -44
ip_fast_csum                                  48       -     -48
intel_cx0pll_readout_hw_state               1085    1037     -48
intel_pstate_update_policies                  66       -     -66
cdclk_divider                                 69       -     -69
kill_super_notify.part                       111       -    -111
__icl_update_topdown_event                   112       -    -112
intel_joiner_adjust_timings                  140       -    -140
intel_fill_fb_info                          2998    2813    -185
intel_tile_width_bytes                       747     531    -216
nl80211_send_iftype_data                     574       -    -574
__do_sys_pidfd_send_signal                   811       -    -811
Total: Before=22547058, After=22548491, chg +0.01%

A lot fewer functions are affected than I expected from such a 
large-scope change.

> Actually, functions with the most impact (x86 locking functions and
> __arch_hweight) were recently converted to asm_inline, so besides
> __untagged_addr, the remaining have very little impact, if at all
> (c.f. amd_clear_divider() ). There is also no need to convert asm()
> without directives inside.

I did the test with Linus-vanilla (81e4f8d68c66) to maximize the 
potential effect, which doesn't have those changes yet.

See tip:WIP.x86/core.

> My proposal would be to convert the remaining few cases (the remaining
> asms involving ALTERNATIVE and exceptions) "by hand" to asm_inline()
> and stick a rule in checkpatch to use asm_inline() in the code
> involving asm(), like we have the rule with asm volatile.
> 
> I don't think redefining an important C keyword is a good approach, it
> obfuscates its meaning too much. And as has been shown by Ingo's
> experiment, there is a substantial effort to fix false positives.
> Instead of fixing these, we can trivially convert the remaining cases
> to asm_volatile() as well, without obfuscating asm(). Checkpatch can
> take care of future cases.

This would work for me too. The cross-arch impact and churn seems 
substantial.

Thanks,

	Ingo

Re: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Uros Bizjak]

On Wed, Mar 19, 2025 at 11:34 PM Ingo Molnar <mingo@kernel.org> wrote:
>
>
> * Uros Bizjak <ubizjak@gmail.com> wrote:
>
> > On Tue, Mar 18, 2025 at 9:11 PM Ingo Molnar <mingo@kernel.org> wrote:
> >
> > >  #ifdef CONFIG_CC_HAS_ASM_INLINE
> > >  # define asm_inline __asm__ __inline
> > >  # define asm(...) asm_inline(__VA_ARGS__)
> > >  #else
> > >  # define asm_inline asm
> > >  #endif
> > >
> > > And I fixed up the places where this isn't syntactically correct:
> > >
> > >  35 files changed, 82 insertions(+), 79 deletions(-)
> > >
> > > I haven't looked at code generation much yet, but text size changes are
> > > minimal:
> > >
> > >       text         data     bss      dec            hex filename
> > >   29429076      7931870 1401196 38762142        24f769e vmlinux.before
> > >   29429631      7931870 1401200 38762701        24f78cd vmlinux.after
> > >
> > > Which is promising, assuming I haven't messed up anywhere.
> >
> > Please use bloat-o-meter, it is more precise.
>
> Here's the bloat-o-meter output between vanilla and patched vmlinux:

[...]

> A lot fewer functions are affected than I expected from such a
> large-scope change.

Interestingly, I got *many* more changes just from converting atomic
locking functions to asm_inline, as reported in [1].

[1] https://lore.kernel.org/lkml/CAFULd4YBcG45bigHBox2pu+To+Y5BzbRxG+pUr42AVOWSnfKsg@mail.gmail.com/

> > Actually, functions with the most impact (x86 locking functions and
> > __arch_hweight) were recently converted to asm_inline, so besides
> > __untagged_addr, the remaining have very little impact, if at all
> > (c.f. amd_clear_divider() ). There is also no need to convert asm()
> > without directives inside.
>
> I did the test with Linus-vanilla (81e4f8d68c66) to maximize the
> potential effect, which doesn't have those changes yet.
>
> See tip:WIP.x86/core.
>
> > My proposal would be to convert the remaining few cases (the remaining
> > asms involving ALTERNATIVE and exceptions) "by hand" to asm_inline()
> > and stick a rule in checkpatch to use asm_inline() in the code
> > involving asm(), like we have the rule with asm volatile.
> >
> > I don't think redefining an important C keyword is a good approach, it
> > obfuscates its meaning too much. And as has been shown by Ingo's
> > experiment, there is a substantial effort to fix false positives.
> > Instead of fixing these, we can trivially convert the remaining cases
> > to asm_volatile() as well, without obfuscating asm(). Checkpatch can
> > take care of future cases.
>
> This would work for me too. The cross-arch impact and churn seems
> substantial.

Perhaps we should also coordinate the effort with Josh, so we won't
step on each other's toes. From my analysis, gains from converting the
remaining asm() that involve ALTERNATIVE would be minor. It is also
questionable if asm() involving exceptions is worth converting at all,
I have to analyse them case-by-case some more during the next
development window.

Thanks,
Uros.

Re: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Ingo Molnar]

* Uros Bizjak <ubizjak@gmail.com> wrote:

> > > > I haven't looked at code generation much yet, but text size changes are
> > > > minimal:
> > > >
> > > >       text         data     bss      dec            hex filename
> > > >   29429076      7931870 1401196 38762142        24f769e vmlinux.before
> > > >   29429631      7931870 1401200 38762701        24f78cd vmlinux.after
> > > >
> > > > Which is promising, assuming I haven't messed up anywhere.
> > >
> > > Please use bloat-o-meter, it is more precise.
> >
> > Here's the bloat-o-meter output between vanilla and patched vmlinux:
> 
> [...]
> 
> > A lot fewer functions are affected than I expected from such a
> > large-scope change.
> 
> Interestingly, I got *many* more changes just from converting atomic
> locking functions to asm_inline, as reported in [1].
> 
> [1] https://lore.kernel.org/lkml/CAFULd4YBcG45bigHBox2pu+To+Y5BzbRxG+pUr42AVOWSnfKsg@mail.gmail.com/

Have you used a pristine x86-64 defconfig for your build tests?

Could you perhaps check my patch against your patch in your build 
environment and figure out why there's such unexpected differences?

As you noted my patch should be a blunt-instrument superset of your 
changes so if then it should affect *more* functions, not fewer.

Thanks,

	Ingo

Re: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Uros Bizjak]

On Thu, Mar 20, 2025 at 9:59 AM Ingo Molnar <mingo@kernel.org> wrote:
>
>
> * Uros Bizjak <ubizjak@gmail.com> wrote:
>
> > > > > I haven't looked at code generation much yet, but text size changes are
> > > > > minimal:
> > > > >
> > > > >       text         data     bss      dec            hex filename
> > > > >   29429076      7931870 1401196 38762142        24f769e vmlinux.before
> > > > >   29429631      7931870 1401200 38762701        24f78cd vmlinux.after
> > > > >
> > > > > Which is promising, assuming I haven't messed up anywhere.
> > > >
> > > > Please use bloat-o-meter, it is more precise.
> > >
> > > Here's the bloat-o-meter output between vanilla and patched vmlinux:
> >
> > [...]
> >
> > > A lot fewer functions are affected than I expected from such a
> > > large-scope change.
> >
> > Interestingly, I got *many* more changes just from converting atomic
> > locking functions to asm_inline, as reported in [1].
> >
> > [1] https://lore.kernel.org/lkml/CAFULd4YBcG45bigHBox2pu+To+Y5BzbRxG+pUr42AVOWSnfKsg@mail.gmail.com/
>
> Have you used a pristine x86-64 defconfig for your build tests?

Yes, it was vanilla x86-64 defconfig, but in -tip tree.

> Could you perhaps check my patch against your patch in your build
> environment and figure out why there's such unexpected differences?
>
> As you noted my patch should be a blunt-instrument superset of your
> changes so if then it should affect *more* functions, not fewer.

Yes, I'll try this experiment.

Thanks,
Uros.

Re: [PATCH] compiler/gcc: Make asm() templates asm __inline__() by default

[Uros Bizjak]

On Thu, Mar 20, 2025 at 11:30 AM Uros Bizjak <ubizjak@gmail.com> wrote:

> > > Interestingly, I got *many* more changes just from converting atomic
> > > locking functions to asm_inline, as reported in [1].
> > >
> > > [1] https://lore.kernel.org/lkml/CAFULd4YBcG45bigHBox2pu+To+Y5BzbRxG+pUr42AVOWSnfKsg@mail.gmail.com/
> >
> > Have you used a pristine x86-64 defconfig for your build tests?
>
> Yes, it was vanilla x86-64 defconfig, but in -tip tree.
>
> > Could you perhaps check my patch against your patch in your build
> > environment and figure out why there's such unexpected differences?
> >
> > As you noted my patch should be a blunt-instrument superset of your
> > changes so if then it should affect *more* functions, not fewer.
>
> Yes, I'll try this experiment.

So, trying your patch on vanilla mainline kernel with gcc-14.2.1
resulted in (approx) the list you reported. However, adding my patch
that converted locking instructions [1] over your patch resulted in
(expected) hundreds (~1700) of changed functions.

[1] https://lore.kernel.org/lkml/20250309170955.48919-1-ubizjak@gmail.com/

The takeout from the experiment is that your proposed change is not
enough to convert "everything" and misses many cases (at least locking
instructions, as confirmed by my experiment). We should use a more
precise instrument and use it case-by-case. This will be some more
work, but on the first look, there are relatively few interesting
cases remaining.

Uros.

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[H. Peter Anvin]

On March 18, 2025 11:04:30 AM PDT, Ingo Molnar <mingo@kernel.org> wrote:
>
>* H. Peter Anvin <hpa@zytor.com> wrote:
>
>> It would be nice to get rid of the bleacherous use of *eax and *ecx 
>> as input-output operands. The use of four separate pointers is just 
>> barely tolerable because the compiler can remove them when the asm is 
>> inlined.
>
>So we have a nice structure of:
>
> struct cpuid_regs {
>         u32 eax;
>         u32 ebx;
>         u32 ecx;
>         u32 edx;
> };
>
>So instead of:
>
> static inline void cpuid_count(unsigned int op, int count,
>                               unsigned int *eax, unsigned int *ebx,
>                               unsigned int *ecx, unsigned int *edx)
>
>... we could have:
>
> static inline void cpuid_count(unsigned int op, int count, struct cpuid_regs *cregs)
>
>or so?
>
>plus we could implement the main CPUID call as:
>
> static inline void native_cpuid(struct cpuid_regs *cregs)
> {
>        /* ecx is often an input as well as an output. */
>        asm volatile("cpuid"
>            : "=a" (cregs->eax),
>              "=b" (cregs->ebx),
>              "=c" (cregs->ecx),
>              "=d" (cregs->edx)
>            : "0" (cregs->eax), "2" (cregs->ecx)
>            : "memory");
> }
>
>and thus we give the asm() statement only a single pointer in essence, 
>'cregs'?
>
>Or do you mean something else?
>
>Thanks,
>
>	Ingo

Yes, I attached an example, but I used the structure as a return.

[PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[mingo]

From: Ingo Molnar <mingo@kernel.org>

This series contains Ahmed S. Darwish's splitting up of <asm/cpuid.h>
into <asm/cpuid/types.h> and <asm/cpuid/api.h>, followed by a couple
of cleanups that create a more maintainable base.

[ This is a resend with a proper SMTP setup. Apologies for the duplication. ]

Thanks,

	Ingo

================>
Ahmed S. Darwish (1):
  x86/cpuid: Refactor <asm/cpuid.h>

Ingo Molnar (4):
  x86/cpuid: Clean up <asm/cpuid/types.h>
  x86/cpuid: Clean up <asm/cpuid/api.h>
  x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>
  x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>

 arch/x86/include/asm/cpuid.h       | 217 +--------------------------------------------------------
 arch/x86/include/asm/cpuid/api.h   | 210 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/x86/include/asm/cpuid/types.h |  32 +++++++++
 3 files changed, 243 insertions(+), 216 deletions(-)
 create mode 100644 arch/x86/include/asm/cpuid/api.h
 create mode 100644 arch/x86/include/asm/cpuid/types.h

-- 
2.45.2

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Linus Torvalds]

On Mon, 17 Mar 2025 at 15:30, <mingo@kernel.org> wrote:
>
> [ This is a resend with a proper SMTP setup. Apologies for the duplication. ]

Yes, now it looks correct from a DKIM standpoint.

But please still fix your name. Now your "From" line is just this:

    From: mingo@kernel.org

rather than your previous series, that had a much more legible

    From: Ingo Molnar <mingo@kernel.org>

in it.

No need to re-send, but for next time...

              Linus

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Ingo Molnar]

* Linus Torvalds <torvalds@linux-foundation.org> wrote:

> On Mon, 17 Mar 2025 at 15:30, <mingo@kernel.org> wrote:
> >
> > [ This is a resend with a proper SMTP setup. Apologies for the duplication. ]
> 
> Yes, now it looks correct from a DKIM standpoint.
> 
> But please still fix your name. Now your "From" line is just this:
> 
>     From: mingo@kernel.org
> 
> rather than your previous series, that had a much more legible
> 
>     From: Ingo Molnar <mingo@kernel.org>
> 
> in it.
> 
> No need to re-send, but for next time...

Oh, that's probably the result of me copy-pasting the documentation:

    # https://korg.docs.kernel.org/mail.html

    [sendemail]
            smtpserver     = mail.kernel.org
            smtpserverport = 465
            smtpencryption = ssl
            from           = [username]@kernel.org
            smtpuser       = [username]

Which I did as:

            from           = mingo@kernel.org

... while it should probably be:

            from           = Ingo Molnar <mingo@kernel.org>

I just did a test-send to myself, and this appears to have done the 
trick.

So maybe the mail.html documentation should be updated to say:

            from           = "Your Real Name" <[username]@kernel.org>

or so?

Thanks,

	Ingo

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Ahmed S. Darwish]

Hi,

On Mon, 17 Mar 2025, mingo@kernel.org wrote:
>
> From: Ingo Molnar <mingo@kernel.org>
>
> This series contains Ahmed S. Darwish's splitting up of <asm/cpuid.h>
> into <asm/cpuid/types.h> and <asm/cpuid/api.h>, followed by a couple
> of cleanups that create a more maintainable base.
>
> [ This is a resend with a proper SMTP setup. Apologies for the duplication. ]
>

Thanks a lot!

Just a small hint that I see this PQ in tip/master, merge commit
b8fefef00c0d ("Merge branch into tip/master: 'x86/cpu'"):

   # New commits in x86/cpu:
      ba501f14e1e6 ("x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>")
      aec28d852ed2 ("x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>")
      f2f828b547ab ("x86/cpuid: Clean up <asm/cpuid/api.h>")
      67a7ae050e7c ("x86/cpuid: Clean up <asm/cpuid/types.h>")
      02b63b33dfc9 ("x86/cpuid: Refactor <asm/cpuid.h>")

But for some reason the above 5 commits are not yet pushed to x86/cpu.

(Sorry if this is expected.)

All the best,

--
Ahmed S. Darwish
Linutronix GmbH

Re: [PATCH 0/5] x86/cpu: Introduce <asm/cpuid/types.h> and <asm/cpuid/api.h> and clean them up

[Ingo Molnar]

* Ahmed S. Darwish <darwi@linutronix.de> wrote:

> Hi,
> 
> On Mon, 17 Mar 2025, mingo@kernel.org wrote:
> >
> > From: Ingo Molnar <mingo@kernel.org>
> >
> > This series contains Ahmed S. Darwish's splitting up of <asm/cpuid.h>
> > into <asm/cpuid/types.h> and <asm/cpuid/api.h>, followed by a couple
> > of cleanups that create a more maintainable base.
> >
> > [ This is a resend with a proper SMTP setup. Apologies for the duplication. ]
> >
> 
> Thanks a lot!
> 
> Just a small hint that I see this PQ in tip/master, merge commit
> b8fefef00c0d ("Merge branch into tip/master: 'x86/cpu'"):
> 
>    # New commits in x86/cpu:
>       ba501f14e1e6 ("x86/cpuid: Use u32 in instead of uint32_t in <asm/cpuid/api.h>")
>       aec28d852ed2 ("x86/cpuid: Standardize on u32 in <asm/cpuid/api.h>")
>       f2f828b547ab ("x86/cpuid: Clean up <asm/cpuid/api.h>")
>       67a7ae050e7c ("x86/cpuid: Clean up <asm/cpuid/types.h>")
>       02b63b33dfc9 ("x86/cpuid: Refactor <asm/cpuid.h>")
> 
> But for some reason the above 5 commits are not yet pushed to x86/cpu.

Yeah, that was a temporary status until a bit more testing could be 
done - I've pushed it out now.

Thanks,

	Ingo