From: Brian Norris <briannorris@chromium.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
Bjorn Helgaas <helgaas@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>, Len Brown <lenb@kernel.org>,
Hsin-Yi Wang <hsinyi@chromium.org>,
linux-kernel@vger.kernel.org, mika.westerberg@linux.intel.com,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
lukas@wunner.de
Subject: Re: [PATCH v5] PCI: Allow PCI bridges to go to D3Hot on all Devicetree based platforms
Date: Thu, 20 Mar 2025 10:57:21 -0700 [thread overview]
Message-ID: <Z9xXAYA4KS5BabhE@google.com> (raw)
In-Reply-To: <20250313052113.zk5yuz5e76uinbq5@thinkpad>
Hi Rafael, Manivannan,
On Thu, Mar 13, 2025 at 10:51:13AM +0530, Manivannan Sadhasivam wrote:
> On Wed, Mar 05, 2025 at 02:41:26PM +0100, Rafael J. Wysocki wrote:
> > There were hardware issues related to PM on x86 platforms predating
> > the introduction of Connected Standby in Windows. For instance,
> > programming a port into D3hot by writing to its PMCSR might cause the
> > PCIe link behind it to go down and the only way to revive it was to
> > power cycle the Root Complex. And similar.
> >
> > Also, PM has never really worked correctly on PCI (non-PCIe) bridges
> > and there is this case where the platform firmware handles hotplug and
> > doesn't want the OS to get in the way (the bridge->is_hotplug_bridge
> > && !pciehp_is_native(bridge) check in pci_bridge_d3_possible()).
> >
> > The DMI check at the end of pci_bridge_d3_possible() is really
> > something to the effect of "there is no particular reason to prevent
> > this bridge from going into D3, but try to avoid platforms where it
> > may not work".
> >
>
> Thanks for sharing the background. This could go in the commit message IMO.
Yes, thanks Rafael. This adds a bit more than the guesswork I've done so
far.
> > Basically, as far as I'm concerned, this check can be changed into
> > something like
> >
> > if (!IS_ENABLED(CONFIG_X86) || dmi_get_bios_year() >= 2015)
> > return true;
I suppose if this harms any non-x86 BIOS systems, we can just add to
bridge_d3_blacklist[]. This works for me too.
> > which also requires updating the comment above it accordingly.
> >
> > This would have been better than the check added by the $subject patch IMV.
>
> Looks good to me. Brian, could you please respin incorporating the comments?
Sure, will send shortly.
Brian
prev parent reply other threads:[~2025-03-20 17:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-26 23:17 [PATCH v5] PCI: Allow PCI bridges to go to D3Hot on all Devicetree based platforms Brian Norris
2024-11-27 6:10 ` Manivannan Sadhasivam
2025-01-07 22:14 ` Brian Norris
2025-02-28 17:45 ` Bjorn Helgaas
2025-02-28 18:39 ` Brian Norris
2025-03-05 6:29 ` Manivannan Sadhasivam
2025-03-05 13:41 ` Rafael J. Wysocki
2025-03-13 5:21 ` Manivannan Sadhasivam
2025-03-20 17:57 ` Brian Norris [this message]
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