Re: [PATCH] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

[William Breathitt Gray <william.gray@linaro.org>]

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On Sun, Mar 12, 2023 at 09:56:25AM -0400, William Breathitt Gray wrote:
> The Counter (CNTR) register is 24 bits wide, but we can have an
> effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> flag and Carry flag. The flags can be read from the FLAG register, but a
> race condition exists: the Borrow flag and Carry flag are instantaneous
> and could change by the time the count value is read from the CNTR
> register.
> 
> Since the race condition could result in an incorrect 25-bit count
> value, remove support for 25-bit count values from this driver;
> hard-coded maximum count values are replaced by a LS7267_CNTR_MAX define
> for consistency and clarity.
> 
> Fixes: f1d8a071d45b ("counter: 104-quad-8: Add Generic Counter interface support")

This bug was actually present when the 104-quad-8 driver was introduced
to the IIO subsystem back in commit 28e5d3bb0325 ("iio: 104-quad-8: Add
IIO support for the ACCES 104-QUAD-8"), so perhaps the Fixes tag should
reference that commit instead.

William Breathitt Gray

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