From: Dylan Jhong <dylan@andestech.com>
To: Guo Ren <guoren@kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<sergey.matyukevich@syntacore.com>, <aou@eecs.berkeley.edu>,
<palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
<x5710999x@gmail.com>, <tim609@andestech.com>,
<peterlin@andestech.com>, <ycliang@andestech.com>
Subject: Re: [PATCH] riscv: mm: Fix incorrect ASID argument when flushing TLB
Date: Mon, 13 Mar 2023 11:32:27 +0800 [thread overview]
Message-ID: <ZA6ZS3hIXWR9PeXV@APC323> (raw)
In-Reply-To: <CAJF2gTTwEJNmee7TcbdbcmLQKTTWpokrUST4xanyreUJHxETqg@mail.gmail.com>
On Sun, Mar 12, 2023 at 08:40:59PM +0800, Guo Ren wrote:
> On Fri, Mar 10, 2023 at 6:32 PM Dylan Jhong <dylan@andestech.com> wrote:
> >
> > Currently, we pass the CONTEXTID instead of the ASID to the TLB flush
> > function. We should only take the ASID field to prevent from touching
> > the reserved bit field.
> >
> > Fixes: 3f1e782998cd ("riscv: add ASID-based tlbflushing methods")
> > Signed-off-by: Dylan Jhong <dylan@andestech.com>
> > ---
> > arch/riscv/include/asm/tlbflush.h | 2 ++
> > arch/riscv/mm/context.c | 3 ++-
> > arch/riscv/mm/tlbflush.c | 2 +-
> > 3 files changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h
> > index 907b9efd39a8..597d6d8aec28 100644
> > --- a/arch/riscv/include/asm/tlbflush.h
> > +++ b/arch/riscv/include/asm/tlbflush.h
> > @@ -12,6 +12,8 @@
> > #include <asm/errata_list.h>
> >
> > #ifdef CONFIG_MMU
> > +extern unsigned long asid_mask;
> > +
> > static inline void local_flush_tlb_all(void)
> > {
> > __asm__ __volatile__ ("sfence.vma" : : : "memory");
> > diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
> > index 80ce9caba8d2..a6b76b33e377 100644
> > --- a/arch/riscv/mm/context.c
> > +++ b/arch/riscv/mm/context.c
> > @@ -22,7 +22,8 @@ DEFINE_STATIC_KEY_FALSE(use_asid_allocator);
> >
> > static unsigned long asid_bits;
> > static unsigned long num_asids;
> > -static unsigned long asid_mask;
> > +unsigned long asid_mask;
> > +EXPORT_SYMBOL(asid_mask);
> Why EXPORT_SYMBOL? (No module would use it by your patch.)
>
OK. I'll remove EXPORT_SYMBOL in v2.
Thanks.
> >
> > static atomic_long_t current_version;
> >
> > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c
> > index ce7dfc81bb3f..ba4c27187c95 100644
> > --- a/arch/riscv/mm/tlbflush.c
> > +++ b/arch/riscv/mm/tlbflush.c
> > @@ -27,7 +27,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start,
> > /* check if the tlbflush needs to be sent to other CPUs */
> > broadcast = cpumask_any_but(cmask, cpuid) < nr_cpu_ids;
> > if (static_branch_unlikely(&use_asid_allocator)) {
> > - unsigned long asid = atomic_long_read(&mm->context.id);
> > + unsigned long asid = atomic_long_read(&mm->context.id) & asid_mask;
> >
> > /*
> > * TLB will be immediately flushed on harts concurrently
> > --
> > 2.34.1
> >
>
>
> --
> Best Regards
> Guo Ren
prev parent reply other threads:[~2023-03-13 3:32 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 10:31 [PATCH] riscv: mm: Fix incorrect ASID argument when flushing TLB Dylan Jhong
2023-03-12 12:40 ` Guo Ren
2023-03-13 3:32 ` Dylan Jhong [this message]
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