Re: Loongson (and other $ARCHs?) idle VS timer enqueue

[Frederic Weisbecker <frederic@kernel.org>]

eeLe Sat, Apr 22, 2023 at 01:38:11PM +0200, Peter Zijlstra a écrit :
> On Sat, Apr 22, 2023 at 10:08:14AM +0200, Peter Zijlstra wrote:
> > On Fri, Apr 21, 2023 at 06:47:29PM +0200, Frederic Weisbecker wrote:
> > 
> > > > *HOWEVER*
> > > > 
> > > > intel_idle_irq() is affected -- except that we only (normally) use that
> > > > for very shallow idle states and it won't interact with NOHZ (because we
> > > > only disable the tick for deep idle states).
> > > 
> > > Well I don't know, that doesn't look comfortable... :)
> > > 
> > > Also why does it need to enable IRQs if ecx=1 ?
> > 
> > Supposedly this is some interrupt latency hack. See commit:
> > 
> >   c227233ad64c ("intel_idle: enable interrupts before C1 on Xeons")
> 
> Something like so perhaps...
> 
> diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h
> index 778df05f8539..07a4072c43de 100644
> --- a/arch/x86/include/asm/mwait.h
> +++ b/arch/x86/include/asm/mwait.h
> @@ -115,8 +115,14 @@ static __always_inline void mwait_idle_with_hints(unsigned long eax, unsigned lo
>  		}
>  
>  		__monitor((void *)&current_thread_info()->flags, 0, 0);
> -		if (!need_resched())
> -			__mwait(eax, ecx);
> +		if (!need_resched()) {
> +			if (ecx & 1) {
> +				__mwait(eax, ecx);
> +			} else {
> +				__sti_mwait(eax, ecx);
> +				raw_local_irq_disable();
> +			}
> +		}

Yep that looks good!

Thanks!