From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAC79C77B7C for ; Fri, 12 May 2023 16:36:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235855AbjELQgD (ORCPT ); Fri, 12 May 2023 12:36:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235448AbjELQgA (ORCPT ); Fri, 12 May 2023 12:36:00 -0400 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B22CAD1A for ; Fri, 12 May 2023 09:35:43 -0700 (PDT) Received: by mail-pg1-x54a.google.com with SMTP id 41be03b00d2f7-530a5ad74e0so271111a12.2 for ; Fri, 12 May 2023 09:35:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683909343; x=1686501343; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=fJVtsVgkJ9xPeAAGT/C87CXV1IF/qgXHBdnwAFzyB8I=; b=1VNxtdKQHKbcU7lqUQORqeDfbAmE33Jz9JeTk4gPQ3CVa5kpsaJ5Mxv3KG0KO1ro3u Ccl5UAMIEsghYui3h7vbtdCJ5jhhcGcKmHs4g0sXYlJiln3detNGXE0ei4phyk79HYAn bWdrdat13IaSNS4qnYv0WtA5jwzRudQvvRdHVyJYKhgTu+mlmaJ+KAxOsxHklg8VKEGR fNaBGNtbiOmR50W8rwor0ixLVLi9We7DMgFzhtwgk0/Iwu+kcvrhHkEC0EJSCnpyVZwy 7VNR5RO2oNREIgvrTU82m/vsv5hVhj55J7RzM8caBxLBHwD8h63w2LxKqYa7c7RueDgB PMcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683909343; x=1686501343; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=fJVtsVgkJ9xPeAAGT/C87CXV1IF/qgXHBdnwAFzyB8I=; b=h9Rj7XKFcb8+1s1glWXPyc4CYa6ELuy5LUfgmyqrWGDrs8TJq4NmLjX2q+URW5CqNA 21562jvRr5OAvTVxKKgYK11LH3jAedsaQPlq1bHGbYaijl/bIKyCqN0+LLDQFw+lbTUf UYnGQH4PnKdkfAe2TLRPv4vIIT7cWSkafT/awxwGxbA6e7Lqd7IM5S48RMXzldEU9u6s Q0gGnRnIjUBtb8l0dddW+LqjiZZcjRYZE3ArOJMz9WSoUnID8QIdpZ06qJx52sebesrC gKlAE848xzuzaxm22hU/lIhvXq9Tzjq054ZrvMWIrvWT2NvFIhm70BPWCEZAydTPljta vLCQ== X-Gm-Message-State: AC+VfDySedIh67Svw8MrBXOxCVh/+50vYFBewviyqDeyqjVVUKCSRmbW Td7pem0ljYU2zozM/c372pocqQ0QxFE= X-Google-Smtp-Source: ACHHUZ4CBKc6IL7gAYfIPzaLSvqPSjfRZ59HmgdGmTz8eILgng02sq5+DVlkeY/SKMuvIZOE1knm71X5xdI= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a63:2d5:0:b0:52c:bf59:f4f2 with SMTP id 204-20020a6302d5000000b0052cbf59f4f2mr6269326pgc.1.1683909343049; Fri, 12 May 2023 09:35:43 -0700 (PDT) Date: Fri, 12 May 2023 09:35:40 -0700 In-Reply-To: Mime-Version: 1.0 References: <20230511233351.635053-1-seanjc@google.com> <20230511233351.635053-6-seanjc@google.com> Message-ID: Subject: Re: [PATCH v2 5/8] KVM: x86: Use MTRR macros to define possible MTRR MSR ranges From: Sean Christopherson To: Kai Huang Cc: "pbonzini@redhat.com" , "kvm@vger.kernel.org" , "guoke@uniontech.com" , "linux-kernel@vger.kernel.org" , "haiwenyao@uniontech.com" Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 12, 2023, Kai Huang wrote: > On Thu, 2023-05-11 at 16:33 -0700, Sean Christopherson wrote: > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > > index e7f78fe79b32..8b356c9d8a81 100644 > > --- a/arch/x86/kvm/x86.c > > +++ b/arch/x86/kvm/x86.c > > @@ -3700,8 +3700,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > > return 1; > > } > > break; > > - case 0x200 ... MSR_IA32_MC0_CTL2 - 1: > > - case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff: > > + case MSR_IA32_CR_PAT: > > + case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000: > > + case MSR_MTRRdefType: > > return kvm_mtrr_set_msr(vcpu, msr, data); > > case MSR_IA32_APICBASE: > > return kvm_set_apic_base(vcpu, msr_info); > > @@ -4108,9 +4109,10 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > > msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset; > > break; > > } > > + case MSR_IA32_CR_PAT: > > case MSR_MTRRcap: > > ... Should we put MSR_IA32_CR_PAT after MSR_MTRRcap so it can be symmetric to > kvm_set_msr_common()? > > Looks there's no reason to put it before MSR_MTRRcap. No, it's above MTRRcap for two reasons: 1. When PAT is moved out of mtrr.c, PAT doesn't get bunded with the other MTRRs and so would just need to be hoisted back up. The end code looks like: case MSR_IA32_CR_PAT: msr_info->data = vcpu->arch.pat; break; case MSR_MTRRcap: case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000: case MSR_MTRRdefType: return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data); 2. There is no MSR_MTRRcap case statement in kvm_set_msr_common() because it's a read-only MSR, i.e. the two can't be symmetric :-) > > - case 0x200 ... MSR_IA32_MC0_CTL2 - 1: > > - case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff: > > + case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000: > > + case MSR_MTRRdefType: > > return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data); > > case 0xcd: /* fsb frequency */ > > msr_info->data = 3; > > -- > > 2.40.1.606.ga4b1b128d6-goog > > >