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[2003:e4:1f05:3a00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id u13-20020a170906c40d00b0094aa087578csm16154555ejz.171.2023.05.02.03.30.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 03:30:13 -0700 (PDT) Date: Tue, 2 May 2023 12:30:11 +0200 From: Thierry Reding To: Christophe JAILLET Cc: "Rafael J. Wysocki" , Viresh Kumar , Jonathan Hunter , Sumit Gupta , linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org, linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH] cpufreq: tegra194: Fix an error handling path in tegra194_cpufreq_probe() Message-ID: References: <30b17e2219abc3a9a137d28bb51e53732bba5103.1682428267.git.christophe.jaillet@wanadoo.fr> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="gK1WG8+Pg3vMnVql" Content-Disposition: inline In-Reply-To: <30b17e2219abc3a9a137d28bb51e53732bba5103.1682428267.git.christophe.jaillet@wanadoo.fr> User-Agent: Mutt/2.2.10 (2023-03-25) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --gK1WG8+Pg3vMnVql Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Apr 25, 2023 at 03:11:19PM +0200, Christophe JAILLET wrote: > If the probe needs to be deferred, some resources still need to be > released. So branch to the error handling path instead of returning > directly. >=20 > Fixes: f41e1442ac5b ("cpufreq: tegra194: add OPP support and set bandwidt= h") > Signed-off-by: Christophe JAILLET > --- > Compile tested-only > --- > drivers/cpufreq/tegra194-cpufreq.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra19= 4-cpufreq.c > index c8d03346068a..36dad5ea5947 100644 > --- a/drivers/cpufreq/tegra194-cpufreq.c > +++ b/drivers/cpufreq/tegra194-cpufreq.c > @@ -686,8 +686,10 @@ static int tegra194_cpufreq_probe(struct platform_de= vice *pdev) > =20 > /* Check for optional OPPv2 and interconnect paths on CPU0 to enable IC= C scaling */ > cpu_dev =3D get_cpu_device(0); > - if (!cpu_dev) > - return -EPROBE_DEFER; > + if (!cpu_dev) { > + err =3D -EPROBE_DEFER; > + goto err_free_res; > + } I think ultimately it'd be better to try get_cpu_device(0) earlier so that we don't do all that work upfront before we fail. However, it looks like there's some other improvements that could be done in that area, so this looks like a good fix in the meantime: Acked-by: Thierry Reding --gK1WG8+Pg3vMnVql Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmRQ5jMACgkQ3SOs138+ s6G2Wg//TRLHO0MURhGFW5IfnB5xXcvKaHVeurXxBdRWI4KuA8CQv5+2plHnEci6 BlU7+GHpOB+3Ch+bfnUVuhFN4WleYecoD69FS9GxwLaYukg7R7ynqVhYX/tccT1w lzkZFUzYqrJMxY4ZAKMD14PmnY7tm/DFQO8Ht7Iu1DWKCRVZTd1udfXpqw4z8spc ndm1uxVz3d2ojvkhevIWOpHYpsCXgbzYMasi1lHpbui/RGUyr6JE1L2CY23+Ne4s KcF/QrhXWRXs6+s40Xi7rQrAgtj/evq0wOlly/YGLBtP4mKpQB1T/o8MlF0NfW3x iQoKEAfBIbmOYodXCYjrZvj8ftq7pOtQbzXWW67wzjOxyDuXc/j2XVodHdoDtJ+0 VSabbpTT+RQsXDM61RxBqeH56mXl6TpJaBLL/reh6BVRESmTPfaqXOkw12BXLYhZ IHDOfbuXvHAT1fhJjOWj2yxiqOhwcsIJVIyQlrBfUIjjf1AKOkaUGgiO4jffHjSG uYyglby74dbDWqLXnotxaMpSNRSCY94kxEw99p2MtsAb/HTOzCpw2SX/PGBePjwI XJCyZ54FOIBBvi+0LBZhjbDitkbILO0zvPZ6etx99jFC2ZRndIqLks22WO/B0h34 mHYcuakHBmhjbnPK+Yt8YbNQtgUo2O401FTHT/Cm78Y5vYybem4= =WBsp -----END PGP SIGNATURE----- --gK1WG8+Pg3vMnVql--