From: Sean Christopherson <seanjc@google.com>
To: Kai Huang <kai.huang@intel.com>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"guoke@uniontech.com" <guoke@uniontech.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"haiwenyao@uniontech.com" <haiwenyao@uniontech.com>
Subject: Re: [PATCH 3/5] KVM: x86: Use MTRR macros to define possible MTRR MSR ranges
Date: Wed, 3 May 2023 23:36:25 +0000 [thread overview]
Message-ID: <ZFLvytrl+Lj+mC4L@google.com> (raw)
In-Reply-To: <b57efeeb80319183e93d5a10bc8a812ff891bd53.camel@intel.com>
On Wed, May 03, 2023, Huang, Kai wrote:
> On Wed, 2023-05-03 at 11:28 -0700, Sean Christopherson wrote:
> > Use the MTRR macros to identify the ranges of possible MTRR MSRs instead
> > of bounding the ranges with a mismash of open coded values and unrelated
> > MSR indices. Carving out the gap for the machine check MSRs in particular
> > is confusing, as it's easy to incorrectly think the case statement handles
> > MCE MSRs instead of skipping them.
> >
> > Drop the range-based funneling of MSRs between the end of the MCE MSRs
> > and MTRR_DEF_TYPE, i.e. 0x2A0-0x2FF, and instead handle MTTR_DEF_TYPE as
> > the one-off case that it is.
> >
> > Extract PAT (0x277) as well in anticipation of dropping PAT "handling"
> > from the MTRR code.
> >
> > Keep the range-based handling for the variable+fixed MTRRs even though
> > capturing unknown MSRs 0x214-0x24F is arguably "wrong". There is a gap in
> > the fixed MTRRs, 0x260-0x267, i.e. the MTRR code needs to filter out
> > unknown MSRs anyways,�
> >
>
> Looks a little bit half measure, but ...
Yeah, I don't love it, but I couldn't convince myself that precisely identifying
known MTRRs was worth the extra effort.
> > and using a single range generates marginally better
> > code for the big switch statement.
>
> could you educate why because I am ignorant of compiler behaviour? :)
Capturing the entire range instead of filtering out the gaps allows the compiler
to handle multiple MSRs with fewer CMP+Jcc checks.
E.g. think of it like this (I actually missed a gap)
if (msr >= 0x200 && msr <= 0x26f)
versus
if ((msr >= 0x200 && msr <= 0x213) || (msr == 0x250) || (msr == 0x258) ||
(msr == 0x259) || (msr >= 0x268 && msr <= 0x26f))
Nothing enormous, and it's not like non-fastpath WRMSR is performance critical,
but add in the extra code for precisely capturing the MTRRs in both x86.c _and_
mtrr.c, and IMO it's worth being imprecise.
next prev parent reply other threads:[~2023-05-03 23:36 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-03 18:28 [PATCH 0/5] KVM: x86: Clean up MSR PAT handling Sean Christopherson
2023-05-03 18:28 ` [PATCH 1/5] KVM: VMX: Open code writing vCPU's PAT in VMX's MSR handler Sean Christopherson
2023-05-03 23:00 ` Huang, Kai
2023-05-03 23:25 ` Sean Christopherson
2023-05-03 23:41 ` Huang, Kai
2023-05-04 17:23 ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 2/5] KVM: SVM: Use kvm_pat_valid() directly instead of kvm_mtrr_valid() Sean Christopherson
2023-05-03 23:04 ` Huang, Kai
2023-05-04 15:34 ` Sean Christopherson
2023-05-05 11:20 ` Huang, Kai
2023-05-11 23:03 ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 3/5] KVM: x86: Use MTRR macros to define possible MTRR MSR ranges Sean Christopherson
2023-05-03 23:23 ` Huang, Kai
2023-05-03 23:36 ` Sean Christopherson [this message]
2023-05-03 23:49 ` Huang, Kai
2023-05-04 9:02 ` Yan Zhao
2023-05-04 15:36 ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 4/5] KVM: x86: WARN if writes to PAT MSR are handled by common KVM code Sean Christopherson
2023-05-03 23:26 ` Huang, Kai
2023-05-03 23:38 ` Sean Christopherson
2023-05-03 18:28 ` [PATCH 5/5] KVM: x86: Move PAT MSR handling out of mtrr.c Sean Christopherson
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