From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE131C77B7C for ; Wed, 10 May 2023 23:50:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236461AbjEJXuJ (ORCPT ); Wed, 10 May 2023 19:50:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229801AbjEJXuI (ORCPT ); Wed, 10 May 2023 19:50:08 -0400 Received: from smtp.gentoo.org (woodpecker.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B48526AF for ; Wed, 10 May 2023 16:50:05 -0700 (PDT) Date: Thu, 11 May 2023 07:49:51 +0800 From: Yixun Lan To: Yangtao Li Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang , Icenowy Zheng , Wei Fu , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/5] riscv: Add the T-HEAD SoC family Kconfig option Message-ID: References: <20230510204456.57202-1-frank.li@vivo.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230510204456.57202-1-frank.li@vivo.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org HI Yangtao: On 04:44 Thu 11 May , Yangtao Li wrote: > From: Jisheng Zhang > > The first SoC in the T-HEAD series is light(a.k.a th1520), containing > quad T-HEAD C910 cores. > > Cc: Icenowy Zheng > Cc: Wei Fu > Signed-off-by: Jisheng Zhang > Signed-off-by: Yangtao Li > --- > arch/riscv/Kconfig.socs | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index 1cf69f958f10..ce10a38dff37 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -41,6 +41,12 @@ config ARCH_SUNXI > This enables support for Allwinner sun20i platform hardware, > including boards based on the D1 and D1s SoCs. > > +config ARCH_THEAD > + bool "T-HEAD RISC-V SoCs" > + select ERRATA_THEAD > + help > + This enables support for the RISC-V based T-HEAD SoCs. This help section is a little bit short.. better to provide more information about the T-Head's SoC series you want to cover? > + > config ARCH_VIRT > def_bool SOC_VIRT > > -- > 2.34.1 > It would be great to have a cover letter for this series plus having an overall history changes Just curious, so you've taked to Jisheng, to take over this series? and will do follow-up version bump? -- Yixun Lan (dlan) Gentoo Linux Developer GPG Key ID AABEFD55