public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Jason Gunthorpe <jgg@nvidia.com>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com,
	kevin.tian@intel.com, alex.williamson@redhat.com,
	tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org,
	dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com,
	fenghua.yu@intel.com, tom.zanussi@linux.intel.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH V5 00/11] vfio/pci: Support dynamic allocation of MSI-X interrupts
Date: Wed, 17 May 2023 11:25:54 -0300	[thread overview]
Message-ID: <ZGTj8oD4VW15eo6K@nvidia.com> (raw)
In-Reply-To: <cover.1683740667.git.reinette.chatre@intel.com>

On Thu, May 11, 2023 at 08:44:27AM -0700, Reinette Chatre wrote:
> 
> Qemu allocates interrupts incrementally at the time the guest unmasks an
> interrupt, for example each time a Linux guest runs request_irq().
> 
> Dynamic allocation of MSI-X interrupts was not possible until v6.2 [1].
> This prompted Qemu to, when allocating a new interrupt, first release all
> previously allocated interrupts (including disable of MSI-X) followed
> by re-allocation of all interrupts that includes the new interrupt.
> Please see [2] for a detailed discussion about this issue.
> 
> Releasing and re-allocating interrupts may be acceptable if all
> interrupts are unmasked during device initialization. If unmasking of
> interrupts occur during runtime this may result in lost interrupts.
> For example, consider an accelerator device with multiple work queues,
> each work queue having a dedicated interrupt. A work queue can be
> enabled at any time with its associated interrupt unmasked while other
> work queues are already active. Having all interrupts released and MSI-X
> disabled to enable the new work queue will impact active work queues.
> 
> This series builds on the recent interrupt sub-system core changes
> that added support for dynamic MSI-X allocation after initial MSI-X
> enabling.
> 
> Add support for dynamic MSI-X allocation to vfio-pci. A flag
> indicating lack of support for dynamic allocation already exist:
> VFIO_IRQ_INFO_NORESIZE and has always been set for MSI and MSI-X. With
> support for dynamic MSI-X the flag is cleared for MSI-X when supported,
> enabling Qemu to modify its behavior.
> 
> Any feedback is appreciated

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Jason

  parent reply	other threads:[~2023-05-17 14:26 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-11 15:44 [PATCH V5 00/11] vfio/pci: Support dynamic allocation of MSI-X interrupts Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 01/11] vfio/pci: Consolidate irq cleanup on MSI/MSI-X disable Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 02/11] vfio/pci: Remove negative check on unsigned vector Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 03/11] vfio/pci: Prepare for dynamic interrupt context storage Reinette Chatre
2023-05-17  2:12   ` Tian, Kevin
2023-05-11 15:44 ` [PATCH V5 04/11] vfio/pci: Move to single error path Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 05/11] vfio/pci: Use xarray for interrupt context storage Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 06/11] vfio/pci: Remove interrupt context counter Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 07/11] vfio/pci: Update stale comment Reinette Chatre
2023-05-17  2:12   ` Tian, Kevin
2023-05-11 15:44 ` [PATCH V5 08/11] vfio/pci: Use bitfield for struct vfio_pci_core_device flags Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 09/11] vfio/pci: Probe and store ability to support dynamic MSI-X Reinette Chatre
2023-05-11 15:44 ` [PATCH V5 10/11] vfio/pci: Support " Reinette Chatre
2023-05-17  2:13   ` Tian, Kevin
2023-05-11 15:44 ` [PATCH V5 11/11] vfio/pci: Clear VFIO_IRQ_INFO_NORESIZE for MSI-X Reinette Chatre
2023-05-16 22:53 ` [PATCH V5 00/11] vfio/pci: Support dynamic allocation of MSI-X interrupts Alex Williamson
2023-05-17  2:14   ` Tian, Kevin
2023-05-17 15:46     ` Reinette Chatre
2023-05-17 14:25 ` Jason Gunthorpe [this message]
2023-05-17 15:47   ` Reinette Chatre
2023-05-22 22:25 ` Thomas Gleixner
2023-05-22 22:52   ` Reinette Chatre
2023-05-23 22:43 ` Alex Williamson
2023-05-24  2:43   ` YangHang Liu
2023-05-24 14:38     ` Reinette Chatre

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZGTj8oD4VW15eo6K@nvidia.com \
    --to=jgg@nvidia.com \
    --cc=alex.williamson@redhat.com \
    --cc=ashok.raj@intel.com \
    --cc=darwi@linutronix.de \
    --cc=dave.jiang@intel.com \
    --cc=fenghua.yu@intel.com \
    --cc=jing2.liu@intel.com \
    --cc=kevin.tian@intel.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=reinette.chatre@intel.com \
    --cc=shameerali.kolothum.thodi@huawei.com \
    --cc=tglx@linutronix.de \
    --cc=tom.zanussi@linux.intel.com \
    --cc=yishaih@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox