From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8BC6C77B7E for ; Thu, 1 Jun 2023 09:56:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232055AbjFAJz6 (ORCPT ); Thu, 1 Jun 2023 05:55:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36902 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233159AbjFAJya (ORCPT ); Thu, 1 Jun 2023 05:54:30 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E0EDE5B; Thu, 1 Jun 2023 02:53:48 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D45A76092A; Thu, 1 Jun 2023 09:53:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 19B5CC433EF; Thu, 1 Jun 2023 09:53:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685613227; bh=fm7sw9sNJNxay74Yt8jfMtjyjVMmd/+OYcZxUbraMcA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=irmlnJdfZQqDpJHR+4hazW/0EFkoY7IbZnEvNqggTskj/EsMDRu54dYy/j77NVYso nlz0GS4Z3EQBpgLv1uXFxwFqv/9slQiO0f8oDSZWcoxfkufh+yyJRF31Xp3jd9pSFe pcPccoQrYfDSDmgY4Mn26q87m60AsIG618tpvtAgcPrQzStQawG879bjNgcYSc8YjT mJDEswbxaVNwAnZfniJaovR7UkIr40m5FABshB3WmZ6MPY3tDG0uhs7CTGik5zypq2 cPx+W9+RSOM2XyYB7kK31CI/0mGqxqRmjanRVDQDgvOSISIYtg4ZcraJdbgHaQiDeE QTYGTzeGm/WyA== Date: Thu, 1 Jun 2023 05:53:46 -0400 From: Sasha Levin To: Michel =?iso-8859-1?Q?D=E4nzer?= Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org, felipe.clark@amd.com, Aric.Cyr@amd.com, wenjing.liu@amd.com, dri-devel@lists.freedesktop.org, Jun.Lei@amd.com, airlied@gmail.com, jiapeng.chong@linux.alibaba.com, Rodrigo Siqueira , amd-gfx@lists.freedesktop.org, aurabindo.pillai@amd.com, Alvin.Lee2@amd.com, harry.wentland@amd.com, sunpeng.li@amd.com, mwen@igalia.com, Daniel Wheeler , Dillon.Varone@amd.com, Wesley Chalmers , qingqing.zhuo@amd.com, Xinhui.Pan@amd.com, daniel@ffwll.ch, Alex Deucher , christian.koenig@amd.com Subject: Re: [PATCH AUTOSEL 6.1 4/9] drm/amd/display: Do not set drr on pipe commit Message-ID: References: <20230511193945.623476-1-sashal@kernel.org> <20230511193945.623476-4-sashal@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 15, 2023 at 03:04:43PM +0200, Michel Dänzer wrote: >On 5/11/23 21:39, Sasha Levin wrote: >> From: Wesley Chalmers >> >> [ Upstream commit 474f01015ffdb74e01c2eb3584a2822c64e7b2be ] >> >> [WHY] >> Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a >> pipe commit can cause underflow. >> >> [HOW] >> Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets >> optimized_required. >> >> This change expects that Freesync requests are blocked when >> optimized_required is true. > >This change caused a regression, see https://patchwork.freedesktop.org/patch/532240/?series=116487&rev=1#comment_972234 / 9deeb132-a317-7419-e9da-cbc0a379c0eb@daenzer.net . Dropped, thanks! -- Thanks, Sasha