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[2003:e4:1f30:5300:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id op26-20020a170906bcfa00b00965aee5be9asm10975ejb.170.2023.06.08.09.12.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jun 2023 09:12:48 -0700 (PDT) Date: Thu, 8 Jun 2023 18:12:46 +0200 From: Thierry Reding To: Peter De Schrijver Cc: jonathanh@nvidia.com, mperttunen@nvidia.com, sudeep.holla@arm.com, talho@nvidia.com, robh@kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, stefank@nvidia.com, krzysztof.kozlowski@linaro.org Subject: Re: [PATCH v4 6/6] firmware: tegra: bpmp: Add support for DRAM MRQ GSCs Message-ID: References: <20230511132048.1122075-1-pdeschrijver@nvidia.com> <20230511132048.1122075-7-pdeschrijver@nvidia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="6AOjTCZJVyiG+eT9" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.10 (2023-03-25) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --6AOjTCZJVyiG+eT9 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Jun 08, 2023 at 02:22:23PM +0300, Peter De Schrijver wrote: > On Wed, Jun 07, 2023 at 05:57:39PM +0200, Thierry Reding wrote: > > > No, on the contrary, now it's clear you can either have void __iomem * > > > and struct gen_pool * or void *virt but not both. > >=20 > > No, it's not clear. You can have one part of your driver write the > > sram.virt field and another read dram.virt and they'll end up pointing > > at the same memory location but with different meaning. That's why you > > need to introduce the enumeration in order to specify which one of the > > two you want to pick. > >=20 > > And that's exactly where you start introducing the potential for > > inconsistency: now you need to be extra careful that the enumeration and > > the unions are set correctly. You effectively have two sources of truth > > and they don't necessarily match. You can also end up (at least > > theoretically) with the invalid value, so you need an extra check for > > that too. > >=20 > > You can avoid all of those inconsistencies if you reduce this to one > > source of truth, namely the pointers that you're going to use. > >=20 >=20 > There are 4 possible states for these pointers: > both NULL > both non-NULL > sram pointer NULL, dram pointer non-NULL > dram pointer NULL, sram pointer non-NULL >=20 > So how is this one source of truth? If you add a tristate enum you turn this into 6 possible states, how is that any better? My point is that the pointer contents are enough to determine which mode we use. In either case we have to make sure that the state is consistent so we can't end up with both non-NULL. The difference is that without the enum we only have to make sure that the pointers are correct. With the additional enum we also need to make sure that that value is consistent with the values that we store in the pointers. Anyway, time is running out, so I'll just apply the series and "fix" this up myself. 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