From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Raag Jadav <raag.jadav@intel.com>
Cc: linus.walleij@linaro.org, mika.westerberg@linux.intel.com,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
mallikarjunappa.sangannavar@intel.com, pandith.n@intel.com
Subject: Re: [PATCH v3 2/3] pinctrl: intel: refine ->irq_set_type() hook
Date: Wed, 14 Jun 2023 19:22:39 +0300 [thread overview]
Message-ID: <ZInpT0dUUVUcKdqv@smile.fi.intel.com> (raw)
In-Reply-To: <20230613085054.10976-3-raag.jadav@intel.com>
On Tue, Jun 13, 2023 at 02:20:53PM +0530, Raag Jadav wrote:
> Utilize a temporary variable for common shift operation
> in ->irq_set_type() hook and improve readability.
> While at it, simplify if-else-if chain and save a few bytes.
>
> add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-16 (-16)
> Function old new delta
> intel_gpio_irq_type 317 301 -16
> Total: Before=10469, After=10453, chg -0.15%
...
> value = readl(reg);
> -
> value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
>
> if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
> - value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT;
> + rxevcfg = PADCFG0_RXEVCFG_EDGE_BOTH;
> } else if (type & IRQ_TYPE_EDGE_FALLING) {
> - value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
> - value |= PADCFG0_RXINV;
> + rxevcfg = PADCFG0_RXEVCFG_EDGE;
> } else if (type & IRQ_TYPE_EDGE_RISING) {
> - value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
> + rxevcfg = PADCFG0_RXEVCFG_EDGE;
> } else if (type & IRQ_TYPE_LEVEL_MASK) {
> - if (type & IRQ_TYPE_LEVEL_LOW)
> - value |= PADCFG0_RXINV;
> + rxevcfg = PADCFG0_RXEVCFG_LEVEL;
> } else {
> - value |= PADCFG0_RXEVCFG_DISABLED << PADCFG0_RXEVCFG_SHIFT;
> + rxevcfg = PADCFG0_RXEVCFG_DISABLED;
> }
>
> + if (type == IRQ_TYPE_EDGE_FALLING || type == IRQ_TYPE_LEVEL_LOW)
> + value |= PADCFG0_RXINV;
> +
> + value |= rxevcfg << PADCFG0_RXEVCFG_SHIFT;
> writel(value, reg);
Looking at this I realized that entire temporary variable assignments can be
done outside of spin lock. You probably would need another one for keeping
rxinv value.
Will it give us any memory reduction in comparison to the current code?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2023-06-14 16:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-13 8:50 [PATCH v3 0/3] Minor improvements for Intel pinctrl Raag Jadav
2023-06-13 8:50 ` [PATCH v3 1/3] pinctrl: intel: refine ->set_mux() hook Raag Jadav
2023-06-14 16:20 ` Andy Shevchenko
2023-06-13 8:50 ` [PATCH v3 2/3] pinctrl: intel: refine ->irq_set_type() hook Raag Jadav
2023-06-14 16:22 ` Andy Shevchenko [this message]
2023-06-15 9:48 ` Jadav, Raag
2023-06-15 9:55 ` mika.westerberg
2023-06-15 10:50 ` Andy Shevchenko
2023-06-15 11:08 ` Jadav, Raag
2023-06-15 11:17 ` Andy Shevchenko
2023-06-13 8:50 ` [PATCH v3 3/3] pinctrl: intel: simplify exit path of ->gpio_request_enable() hook Raag Jadav
2023-06-13 15:38 ` Andy Shevchenko
2023-06-19 13:53 ` Andy Shevchenko
2023-06-14 5:14 ` [PATCH v3 0/3] Minor improvements for Intel pinctrl Mika Westerberg
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