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From: Aurelien Jarno <aurelien@aurel32.net>
To: Walker Chen <walker.chen@starfivetech.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v6 4/4] riscv: dts: starfive: add dma controller node
Date: Sun, 2 Jul 2023 00:01:29 +0200	[thread overview]
Message-ID: <ZKCiOQ0IuptKO8kr@aurel32.net> (raw)
In-Reply-To: <20230322094820.24738-5-walker.chen@starfivetech.com>

On 2023-03-22 17:48, Walker Chen wrote:
> Add the dma controller node for the Starfive JH7110 SoC.
> 
> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 17220576b21c..b503b6137743 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -510,6 +510,24 @@
>  			#gpio-cells = <2>;
>  		};
>  
> +		dma: dma-controller@16050000 {
> +			compatible = "starfive,jh7110-axi-dma";
> +			reg = <0x0 0x16050000 0x0 0x10000>;
> +			clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>,
> +				 <&stgcrg JH7110_STGCLK_DMA1P_AHB>;
> +			clock-names = "core-clk", "cfgr-clk";
> +			resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>,
> +				 <&stgcrg JH7110_STGRST_DMA1P_AHB>;
> +			interrupts = <73>;
> +			#dma-cells = <1>;
> +			dma-channels = <4>;
> +			snps,dma-masters = <1>;
> +			snps,data-width = <3>;
> +			snps,block-size = <65536 65536 65536 65536>;
> +			snps,priority = <0 1 2 3>;
> +			snps,axi-max-burst-len = <16>;
> +		};
> +
>  		aoncrg: clock-controller@17000000 {
>  			compatible = "starfive,jh7110-aoncrg";
>  			reg = <0x0 0x17000000 0x0 0x10000>;

It appears that this patch has never been applied, although the rest of
the series has already been merged. Unfortunately it doesn't apply
anymore due to other changes to that file.

Could you please rebase and repost it?

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                     http://aurel32.net

  reply	other threads:[~2023-07-01 22:01 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-22  9:48 [PATCH v6 0/4] Add DMA driver for StarFive JH7110 SoC Walker Chen
2023-03-22  9:48 ` [PATCH v6 1/4] dt-bindings: dma: snps,dw-axi-dmac: constrain the items of resets for JH7110 dma Walker Chen
2023-03-22  9:48 ` [PATCH v6 2/4] dmaengine: dw-axi-dmac: Add support for StarFive JH7110 DMA Walker Chen
2023-03-24 13:33   ` Emil Renner Berthing
2023-03-31 12:04   ` Vinod Koul
2023-04-03 12:07     ` Walker Chen
2023-03-22  9:48 ` [PATCH v6 3/4] dmaengine: dw-axi-dmac: Increase polling time to DMA transmission completion status Walker Chen
2023-03-22  9:48 ` [PATCH v6 4/4] riscv: dts: starfive: add dma controller node Walker Chen
2023-07-01 22:01   ` Aurelien Jarno [this message]
2023-07-01 23:03     ` Conor Dooley
2023-07-03  1:35     ` Walker Chen
2023-04-12 17:27 ` [PATCH v6 0/4] Add DMA driver for StarFive JH7110 SoC Vinod Koul
2023-04-13  1:29   ` Walker Chen

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