From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96DFDC001B0 for ; Sat, 1 Jul 2023 22:01:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229754AbjGAWBz (ORCPT ); Sat, 1 Jul 2023 18:01:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229502AbjGAWBx (ORCPT ); Sat, 1 Jul 2023 18:01:53 -0400 Received: from hall.aurel32.net (hall.aurel32.net [IPv6:2001:bc8:30d7:100::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C94C11725; Sat, 1 Jul 2023 15:01:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=aurel32.net ; s=202004.hall; h=In-Reply-To:Content-Type:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Content-Transfer-Encoding:From:Reply-To: Subject:Content-ID:Content-Description:X-Debbugs-Cc; bh=awuPIRBOTCLPchkWj4ebZYVqHfMO7eHE5JTOy/aYNHY=; b=h1iYvb7zvOgUfccHyUvSVw+BsK PnsLEzDiZPkSggABGw1ftJsK318vzOrCOGkbRnfUWTy6q5I/L1/fU5h4snd1x6nMUoOtPoednRfHn jDf4pcqSQq5ypoiXEDWiVzWKSObeQSm3OOflf71Wxs320FHTYS06VIyVX7Aq5n1Kt/UKKezTKw2NB egE/RmV06MsWgAT1uo8MRvgTCQmTNHUj5wK4b82Yd6YC6/rVmQcZWNJvD3RmyScG9D13dHsYzINDd 0q8Gmvk0rngnaNB0TklOPAlI3NZOkARUJ21pFjsJlZJL2US/ySO8atUJ2Xz1yBaUulaL9Lt+5H3xC 4DQdTRZw==; Received: from [2a01:e34:ec5d:a741:8a4c:7c4e:dc4c:1787] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1qFieo-00F95d-3k; Sun, 02 Jul 2023 00:01:30 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.96) (envelope-from ) id 1qFien-00FECR-1d; Sun, 02 Jul 2023 00:01:29 +0200 Date: Sun, 2 Jul 2023 00:01:29 +0200 From: Aurelien Jarno To: Walker Chen Cc: Eugeniy Paltsev , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Emil Renner Berthing , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v6 4/4] riscv: dts: starfive: add dma controller node Message-ID: Mail-Followup-To: Walker Chen , Eugeniy Paltsev , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Emil Renner Berthing , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20230322094820.24738-1-walker.chen@starfivetech.com> <20230322094820.24738-5-walker.chen@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230322094820.24738-5-walker.chen@starfivetech.com> User-Agent: Mutt/2.2.9 (2022-11-12) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2023-03-22 17:48, Walker Chen wrote: > Add the dma controller node for the Starfive JH7110 SoC. > > Reviewed-by: Emil Renner Berthing > Signed-off-by: Walker Chen > --- > arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > index 17220576b21c..b503b6137743 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > @@ -510,6 +510,24 @@ > #gpio-cells = <2>; > }; > > + dma: dma-controller@16050000 { > + compatible = "starfive,jh7110-axi-dma"; > + reg = <0x0 0x16050000 0x0 0x10000>; > + clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>, > + <&stgcrg JH7110_STGCLK_DMA1P_AHB>; > + clock-names = "core-clk", "cfgr-clk"; > + resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>, > + <&stgcrg JH7110_STGRST_DMA1P_AHB>; > + interrupts = <73>; > + #dma-cells = <1>; > + dma-channels = <4>; > + snps,dma-masters = <1>; > + snps,data-width = <3>; > + snps,block-size = <65536 65536 65536 65536>; > + snps,priority = <0 1 2 3>; > + snps,axi-max-burst-len = <16>; > + }; > + > aoncrg: clock-controller@17000000 { > compatible = "starfive,jh7110-aoncrg"; > reg = <0x0 0x17000000 0x0 0x10000>; It appears that this patch has never been applied, although the rest of the series has already been merged. Unfortunately it doesn't apply anymore due to other changes to that file. Could you please rebase and repost it? -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://aurel32.net