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From: Jason Gunthorpe <jgg@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	jean-philippe@linaro.org, baolu.lu@linux.intel.com,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master
Date: Thu, 13 Jul 2023 13:41:38 -0300	[thread overview]
Message-ID: <ZLApQjaqoOshT2TJ@nvidia.com> (raw)
In-Reply-To: <CAKHBV25YadRVFiag5z5Yc13L093ScWkCjAOCd=VuGm2RUaDyzA@mail.gmail.com>

On Fri, Jul 14, 2023 at 12:16:16AM +0800, Michael Shavit wrote:
> On Thu, Jul 13, 2023 at 10:29 PM Jason Gunthorpe <jgg@nvidia.com> wrote:
> > It would make alot more sense if the STE value used by an unmanaged S1
> > domain was located in/near the unmanaged domain or called 'unmanaged
> > S1 STE' or something if it really has to be in the master. Why does
> > this even need to be stored, can't we compute it?
> 
> struct s1_cfg* and struct s2_cfg* are precisely what is used to
> compute an STE. For example, when s1_cfg is set, arm_smmu_write_strtab
> will write the s1_cfg's CD table dma_pointer into the STE's
> STRTAB_STE_0_CFG field. When neither are set, the STE fields are
> written to enable bypass (or abort depending on the config).

I guess I never really understood why these were precomputed and
stored at all. Even more confusing is why we need to keep pointers to
them anywhere? Compute the STE and CDE directly from the source data
when you need it?

eg If I want to install an IDENITY domain into a STE then I compute
the STE for identity and go ahead and do it.

> > I'd think the basic mental model should be to extract the STE from the
> > thing you intend to install. Either the default CD table, or from the
> > iommu_domain. ie some 'get STE from iommu_domain' function?
> 
> I don't follow this. When we attach a domain with pasid (whether
> through SVA or the set_dev_pasid API) , we don't want to install an
> entirely new CD table. 

The master object owns an optional CD table. If it is exsists it is
used by every domain that is attached to that master.

In the code flow there are two entry points to attach a domain, attach
to a PASID or attach to a RID.

For attach to PASID the code should always force the master to have a
CD table and then attach the domain to the CD table.

For attach to RID the code should do a bunch of checks and decide if
it should force the master to have a CD table and attach the domain to
that, or directly attach the domain to the STE.

When the master gains a CD table then the CD table object becomes
attached to the STE. In all cases we should be able to point to the
object the STE points at and don't need a cfg or pointer to cfg since
the object itself can provide the cfg.

In all cases when you go to compute a STE you figure out what object
is attached to it (CD or domain), compute the correct STE for that
object, the set it. Same for he CDE, query the correct CDE from the
iommu_domain when you attach it to the table.

There should be no such thing as a "default" STE, and I question if it
makes sense to even precompute the s1/s2_cfg values during finalize at
all..

> We want to write something (page-table pointer) to a common CD
> table. Where should the s1_cfg which owns that common table live? 

I would suggest a 'cd table struct' that as all the stuff related to
the CD table, including an API to cacluate the STE this CD table
requires. If not in actual code with a real struct, then in a logical
sense in that a chunk of the master struct is the "CD table".

> I thought we concluded that it should be owned by the
> arm_smmu_master rather than any domain (to avoid dependencies
> between domains a-la aux-domain). 

Yes, I'm not saying anything against that, just how and where the STE
and CDE values flow around.

Jason

  parent reply	other threads:[~2023-07-13 16:42 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-21  6:37 [PATCH v4 00/13] Add PASID support to SMMUv3 unmanaged domains Michael Shavit
2023-06-21  6:37 ` [PATCH v4 01/13] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg Michael Shavit
2023-06-21  6:37 ` [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master Michael Shavit
2023-07-13  1:22   ` Nicolin Chen
2023-07-13  8:34     ` Michael Shavit
2023-07-13 14:29       ` Jason Gunthorpe
2023-07-13 16:16         ` Michael Shavit
2023-07-13 16:34           ` Michael Shavit
2023-07-13 16:41           ` Jason Gunthorpe [this message]
2023-07-13 19:54             ` Nicolin Chen
2023-07-13 23:48               ` Jason Gunthorpe
2023-07-14  1:14                 ` Nicolin Chen
2023-07-14  9:12                   ` Michael Shavit
2023-07-14 11:58                     ` Will Deacon
2023-07-14 12:50                     ` Jason Gunthorpe
2023-07-14  8:02             ` Michael Shavit
2023-07-14 13:21               ` Jason Gunthorpe
2023-07-17 10:06                 ` Michael Shavit
2023-07-17 12:29                   ` Jason Gunthorpe
2023-07-18  8:56                     ` Michael Shavit
2023-07-27 11:22                       ` Michael Shavit
2023-07-27 11:54                         ` Jason Gunthorpe
2023-07-27 14:04                           ` Michael Shavit
2023-07-27 14:21                             ` Jason Gunthorpe
2023-06-21  6:37 ` [PATCH v4 03/13] iommu/arm-smmu-v3: Refactor write_strtab_ent Michael Shavit
2023-07-13  1:41   ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 04/13] iommu/arm-smmu-v3: Refactor write_ctx_desc Michael Shavit
2023-06-21  6:37 ` [PATCH v4 05/13] iommu/arm-smmu-v3: Use the master-owned s1_cfg Michael Shavit
2023-07-13  1:57   ` Nicolin Chen
2023-07-13  4:25     ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 06/13] iommu/arm-smmu-v3: Simplify arm_smmu_enable_ats Michael Shavit
2023-06-21  6:37 ` [PATCH v4 07/13] iommu/arm-smmu-v3: Keep track of attached ssids Michael Shavit
2023-07-13  2:09   ` Nicolin Chen
2023-07-21  6:48     ` Michael Shavit
2023-07-27  4:44       ` Nicolin Chen
2023-07-13  4:45   ` Nicolin Chen
2023-07-14  9:30     ` Michael Shavit
2023-07-15  0:35       ` Nicolin Chen
2023-07-18  8:51         ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 08/13] iommu/arm-smmu-v3: Add helper for atc invalidation Michael Shavit
2023-06-21  6:37 ` [PATCH v4 09/13] iommu/arm-smmu-v3: Implement set_dev_pasid Michael Shavit
2023-06-23  0:32   ` Nicolin Chen
2023-06-26  2:33     ` Michael Shavit
2023-06-26 18:14       ` Nicolin Chen
2023-06-28 13:36         ` Michael Shavit
2023-07-13  8:44   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 10/13] iommu/arm-smmu-v3-sva: Remove bond refcount Michael Shavit
2023-06-21  6:37 ` [PATCH v4 11/13] iommu/arm-smmu-v3-sva: Clean unused iommu_sva Michael Shavit
2023-06-21  6:37 ` [PATCH v4 12/13] iommu/arm-smmu-v3-sva: Remove arm_smmu_bond Michael Shavit
2023-07-13  8:41   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 13/13] iommu/arm-smmu-v3-sva: Add check when enabling sva Michael Shavit

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