From: Jason Gunthorpe <jgg@nvidia.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
iommu@lists.linux.dev, Lu Baolu <baolu.lu@linux.intel.com>,
Joerg Roedel <joro@8bytes.org>,
Jean-Philippe Brucker <jean-philippe@linaro.com>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Tony Luck <tony.luck@intel.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: Re: [PATCH v12 1/8] iommu: Generalize PASID 0 for normal DMA w/o PASID
Date: Fri, 4 Aug 2023 10:51:59 -0300 [thread overview]
Message-ID: <ZM0Cf4p43/S4qGof@nvidia.com> (raw)
In-Reply-To: <20230802212427.1497170-2-jacob.jun.pan@linux.intel.com>
On Wed, Aug 02, 2023 at 02:24:20PM -0700, Jacob Pan wrote:
> PCIe Process address space ID (PASID) is used to tag DMA traffic, it
> provides finer grained isolation than requester ID (RID).
>
> For each device/RID, 0 is a special PASID for the normal DMA (no
> PASID). This is universal across all architectures that supports PASID,
> therefore warranted to be reserved globally and declared in the common
> header. Consequently, we can avoid the conflict between different PASID
> use cases in the generic code. e.g. SVA and DMA API with PASIDs.
>
> This paved away for device drivers to choose global PASID policy while
> continue doing normal DMA.
>
> Noting that VT-d could support none-zero RID/NO_PASID, but currently not
> used.
>
> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> ---
> v8:
> - make consistent use of NO_PASID in SMMU code
> - remove PASID_MIN
> v7:
> - renamed IOMMU_DEF_RID_PASID to be IOMMU_NO_PASID to be more generic
> v6:
> - let SMMU code use the common RID_PASID macro
> ---
> .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 2 +-
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++-------
> drivers/iommu/intel/iommu.c | 24 +++++++++----------
> drivers/iommu/intel/pasid.c | 2 +-
> drivers/iommu/intel/pasid.h | 2 --
> include/linux/iommu.h | 1 +
> 6 files changed, 23 insertions(+), 24 deletions(-)
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Jason
next prev parent reply other threads:[~2023-08-04 13:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-02 21:24 [PATCH v12 0/8] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-08-02 21:24 ` [PATCH v12 1/8] iommu: Generalize PASID 0 for normal DMA w/o PASID Jacob Pan
2023-08-04 13:51 ` Jason Gunthorpe [this message]
2023-08-02 21:24 ` [PATCH v12 2/8] iommu: Move global PASID allocation from SVA to core Jacob Pan
2023-08-04 13:51 ` Jason Gunthorpe
2023-08-02 21:24 ` [PATCH v12 3/8] iommu/vt-d: Add domain_flush_pasid_iotlb() Jacob Pan
2023-08-02 21:24 ` [PATCH v12 4/8] iommu/vt-d: Remove pasid_mutex Jacob Pan
2023-08-02 21:24 ` [PATCH v12 5/8] iommu/vt-d: Make prq draining code generic Jacob Pan
2023-08-02 21:24 ` [PATCH v12 6/8] iommu/vt-d: Prepare for set_dev_pasid callback Jacob Pan
2023-08-02 21:24 ` [PATCH v12 7/8] iommu/vt-d: Add set_dev_pasid callback for dma domain Jacob Pan
2023-08-02 21:24 ` [PATCH v12 8/8] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-08-08 16:51 ` [PATCH v12 0/8] Re-enable IDXD " Jacob Pan
2023-08-08 23:29 ` Baolu Lu
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