public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Sean Christopherson <seanjc@google.com>
To: Chao Gao <chao.gao@intel.com>
Cc: Yang Weijiang <weijiang.yang@intel.com>,
	pbonzini@redhat.com, peterz@infradead.org, john.allen@amd.com,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	rick.p.edgecombe@intel.com, binbin.wu@linux.intel.com
Subject: Re: [PATCH v4 15/20] KVM:VMX: Save host MSR_IA32_S_CET to VMCS field
Date: Wed, 26 Jul 2023 07:05:18 -0700	[thread overview]
Message-ID: <ZMEoHgAm29baVbdp@google.com> (raw)
In-Reply-To: <ZMDdp1A7DOsRNeTd@chao-email>

On Wed, Jul 26, 2023, Chao Gao wrote:
> On Thu, Jul 20, 2023 at 11:03:47PM -0400, Yang Weijiang wrote:
> >Save host MSR_IA32_S_CET to VMCS field as host constant state.
> >Kernel IBT is supported now and the setting in MSR_IA32_S_CET
> >is static after post-boot except in BIOS call case, but vCPU
> >won't execute such BIOS call path currently, so it's safe to
> >make the MSR as host constant.
> >
> >Suggested-by: Sean Christopherson <seanjc@google.com>
> >Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> >---
> > arch/x86/kvm/vmx/capabilities.h | 4 ++++
> > arch/x86/kvm/vmx/vmx.c          | 8 ++++++++
> > 2 files changed, 12 insertions(+)
> >
> >diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
> >index d0abee35d7ba..b1883f6c08eb 100644
> >--- a/arch/x86/kvm/vmx/capabilities.h
> >+++ b/arch/x86/kvm/vmx/capabilities.h
> >@@ -106,6 +106,10 @@ static inline bool cpu_has_load_perf_global_ctrl(void)
> > 	return vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
> > }
> > 
> >+static inline bool cpu_has_load_cet_ctrl(void)
> >+{
> >+	return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_CET_STATE);
> 
> VM_ENTRY_LOAD_CET_STATE is to load guest state. Strictly speaking, you
> should check VM_EXIT_LOAD_HOST_CET_STATE though I believe CPUs will
> support both or none.

No need, pairs are now handled by setup_vmcs_config().  See commit f5a81d0eb01e
("KVM: VMX: Sanitize VM-Entry/VM-Exit control pairs at kvm_intel load time"), and
then patch 17 does:

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 3eb4fe9c9ab6..3f2f966e327d 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2641,6 +2641,7 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,
                { VM_ENTRY_LOAD_IA32_EFER,              VM_EXIT_LOAD_IA32_EFER },
                { VM_ENTRY_LOAD_BNDCFGS,                VM_EXIT_CLEAR_BNDCFGS },
                { VM_ENTRY_LOAD_IA32_RTIT_CTL,          VM_EXIT_CLEAR_IA32_RTIT_CTL },
+               { VM_ENTRY_LOAD_CET_STATE,              VM_EXIT_LOAD_CET_STATE },
        };

> 
> >+}
> > static inline bool cpu_has_vmx_mpx(void)
> > {
> > 	return vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS;
> >diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> >index 85cb7e748a89..cba24acf1a7a 100644
> >--- a/arch/x86/kvm/vmx/vmx.c
> >+++ b/arch/x86/kvm/vmx/vmx.c
> >@@ -109,6 +109,8 @@ module_param(enable_apicv, bool, S_IRUGO);
> > bool __read_mostly enable_ipiv = true;
> > module_param(enable_ipiv, bool, 0444);
> > 
> >+static u64 __read_mostly host_s_cet;
> 
> caching host's value is to save an MSR read on vCPU creation?

Yep.  And probably more importantly, to document that the host value is static,
i.e. that KVM doesn't need to refresh S_CET before every VM-Enter/VM-Exit sequence.

  reply	other threads:[~2023-07-26 14:05 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21  3:03 [PATCH v4 00/20] Enable CET Virtualization Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 01/20] x86/cpufeatures: Add CPU feature flags for shadow stacks Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 02/20] x86/fpu/xstate: Introduce CET MSR and XSAVES supervisor states Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 03/20] KVM:x86: Report XSS as to-be-saved if there are supported features Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 04/20] KVM:x86: Refresh CPUID on write to guest MSR_IA32_XSS Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 05/20] KVM:x86: Initialize kvm_caps.supported_xss Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 06/20] KVM:x86: Load guest FPU state when access XSAVE-managed MSRs Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 07/20] KVM:x86: Add fault checks for guest CR4.CET setting Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 08/20] KVM:x86: Report KVM supported CET MSRs as to-be-saved Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 09/20] KVM:x86: Add common code of CET MSR access Yang Weijiang
2023-07-26  7:33   ` Chao Gao
2023-07-26  8:26     ` Yang, Weijiang
2023-07-26 13:46       ` Chao Gao
2023-07-27  6:06         ` Yang, Weijiang
2023-07-27  7:41           ` Chao Gao
2023-07-27 16:58             ` Sean Christopherson
2023-07-21  3:03 ` [PATCH v4 10/20] KVM:x86: Make guest supervisor states as non-XSAVE managed Yang Weijiang
2023-07-24  8:26   ` Chao Gao
2023-07-24 13:50     ` Yang, Weijiang
2023-07-21  3:03 ` [PATCH v4 11/20] KVM:x86: Save and reload GUEST_SSP to/from SMRAM Yang Weijiang
2023-07-24  9:13   ` Chao Gao
2023-07-24 14:16     ` Yang, Weijiang
2023-07-24 14:26       ` Sean Christopherson
2023-07-21  3:03 ` [PATCH v4 12/20] KVM:VMX: Introduce CET VMCS fields and control bits Yang Weijiang
2023-07-27  5:26   ` Chao Gao
2023-07-27  7:13     ` Yang, Weijiang
2023-07-21  3:03 ` [PATCH v4 13/20] KVM:VMX: Emulate read and write to CET MSRs Yang Weijiang
2023-07-26  8:06   ` Chao Gao
2023-07-27  3:19     ` Yang, Weijiang
2023-07-27  5:16       ` Chao Gao
2023-07-27  7:10         ` Yang, Weijiang
2023-07-27 15:20           ` Sean Christopherson
2023-07-28  0:43             ` Yang, Weijiang
2023-07-21  3:03 ` [PATCH v4 14/20] KVM:VMX: Set up interception for " Yang Weijiang
2023-07-26  8:30   ` Chao Gao
2023-07-27  3:48     ` Yang, Weijiang
2023-07-21  3:03 ` [PATCH v4 15/20] KVM:VMX: Save host MSR_IA32_S_CET to VMCS field Yang Weijiang
2023-07-26  8:47   ` Chao Gao
2023-07-26 14:05     ` Sean Christopherson [this message]
2023-07-27  7:29       ` Yang, Weijiang
2023-07-21  3:03 ` [PATCH v4 16/20] KVM:x86: Optimize CET supervisor SSP save/reload Yang Weijiang
2023-07-27  3:27   ` Chao Gao
2023-07-27  6:23     ` Yang, Weijiang
2023-07-21  3:03 ` [PATCH v4 17/20] KVM:x86: Enable CET virtualization for VMX and advertise to userspace Yang Weijiang
2023-07-27  6:32   ` Chao Gao
2023-07-27  7:26     ` Yang, Weijiang
2023-07-21  3:03 ` [PATCH v4 18/20] KVM:x86: Enable guest CET supervisor xstate bit support Yang Weijiang
2023-07-27  8:03   ` Chao Gao
2023-07-21  3:03 ` [PATCH v4 19/20] KVM:nVMX: Refine error code injection to nested VM Yang Weijiang
2023-07-21  3:03 ` [PATCH v4 20/20] KVM:nVMX: Enable CET support for " Yang Weijiang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZMEoHgAm29baVbdp@google.com \
    --to=seanjc@google.com \
    --cc=binbin.wu@linux.intel.com \
    --cc=chao.gao@intel.com \
    --cc=john.allen@amd.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=rick.p.edgecombe@intel.com \
    --cc=weijiang.yang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox