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Mon, 31 Jul 2023 21:52:30 -0700 Date: Mon, 31 Jul 2023 21:52:29 -0700 From: Nicolin Chen To: Michael Shavit CC: , , , , , , Subject: Re: [PATCH v2 4/8] iommu/arm-smmu-v3: move stall_enabled to the cd table Message-ID: References: <20230731104833.800114-1-mshavit@google.com> <20230731184817.v2.4.I5aa89c849228794a64146cfe86df21fb71629384@changeid> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT052:EE_|SN7PR12MB7274:EE_ X-MS-Office365-Filtering-Correlation-Id: 6abaa34d-366b-43c6-434b-08db924b24c3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: hUk/yFnMGKTXUrp9+zJkysq7j98qvEdc6jPagQuZyL9tD/u2MN5r3yp5cg5J9gzuUddNzfP5lS68tSKDJqv9tkCBNxr338AdseiiPVq71xgnaau/U3jTPu5A18MXTFLFLdoRIkA8MaxgQb0xbipi0sBoNyyf1ghd46lg8QtGA9hTIrVXZ2FBSbYRp5UxgqihTova6R8puBWstd873JxFj3bRGa5fyI8adtKgfsK+QzbN+JEnthMf8tV8z2F7f1wKKw+TgQoTvU++7GMlOsKnWyTjB2Rgxl7EutdK4UjJl5dm5J/vG9Sv1GuKtyEzLfiX7i1UzPa9uf48USeGGID/c2eBfFrluMO5wyRZEuXfmpyLHfsZPdNZwdh+ftZeh5WUz/9N5ItMBQgzojyRBe7kOxLOEUgefNQJiVu+rf9qq8siNtl74yLO4A2Oicqrs1ww+3KyBnhsPog0GM9f2+sgySq56QoC0iM9oTraOfybAJ5EjNZuWGltObh7l/pSVIQCVpXitJqdLgsgVywOY2a/zRh0Q9RCLkA7B/z422n4xXqUwQ2C1koy76ZO3pblEkTZy4MbOhIZSgApsVJLgQTPvSvcGExCC3LABPtBXcTVkEmQ1IHHoDlaVxUtT0KZ5XlssALlyDOlWk9NGWYvZKRVvaxqHVP2rp/dor7MsuEnsRAyswk98Hz6MhklUCrE0Qg5/LPGeXo3fXwtLJHL2bq9bdvN55pM8VExmyWJEOF9B8Y6xRVK0YjEQn6h905h4BgO X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230028)(4636009)(346002)(39860400002)(376002)(136003)(396003)(82310400008)(451199021)(46966006)(40470700004)(36840700001)(9686003)(47076005)(36860700001)(55016003)(40460700003)(40480700001)(26005)(83380400001)(336012)(186003)(426003)(70206006)(7636003)(70586007)(54906003)(356005)(33716001)(82740400003)(41300700001)(86362001)(316002)(5660300002)(6916009)(4326008)(8676002)(8936002)(2906002)(478600001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Aug 2023 04:52:43.8473 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6abaa34d-366b-43c6-434b-08db924b24c3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT052.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7274 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jul 31, 2023 at 09:28:40PM -0700, Nicolin Chen wrote: > On Mon, Jul 31, 2023 at 06:48:14PM +0800, Michael Shavit wrote: > > This controls whether CD entries will have the stall bit set when > > writing entries into the table. > > > > Signed-off-by: Michael Shavit > > --- > > > > Changes in v2: > > - Use a bitfield instead of a bool for stall_enabled > > > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++---- > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++- > > 2 files changed, 6 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > index 8a286e3838d70..654acf6002bf3 100644 > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, > > FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | > > CTXDESC_CD_0_V; > > > > - if (smmu_domain->stall_enabled) > > + if (smmu_domain->cd_table.stall_enabled) > > val |= CTXDESC_CD_0_S; > > This cd_table->stall_enabled comes from master->stall_enabled, and > cd_table will be in master structure. Also, struct arm_smmu_master > pointer will be passed in to arm_smmu_write_ctx_desc(). So, there > seems to be no need of master->cd_table.stall_enabled in the end; > just use master->stall_enabled directly? Actually the stall_enabled might still need to be per-CD/domain. If a domain is attached by two masters. The domain->stall_enabled is initialized with the first master->stall_enabled. Then, the second master->stall_enabled would be required to match with the domain->stall_enabled. arm_smmu_attach_dev() has such a sanity. So, I think we might not need this patch. Nicolin