Re: [PATCH 0/5] Share sva domains with all devices bound to a mm

Baolu Lu
2023-08-09T00:18:26Z

On 2023/8/8 15:49, Tina Zhang wrote:
> A sva domain's lifetime begins with binding a device to a mm and ends
> by releasing all the bound devices from that sva domain. Technically,
> there could be more than one sva domain identified by the mm PASID for
> the use of bound devices issuing DMA transactions.
>
> To support mm PASID 1:n with sva domains, each mm needs to keep both a
> reference list of allocated sva domains and the corresponding PASID.
> However, currently, mm struct only has one pasid field for sva usage,
> which is used to keep the info of an assigned PASID. That pasid field
> cannot provide sufficient info to build up the 1:n mapping between PASID
> and sva domains.

Is it more appropriate to have the same life cycle for sva domain and mm
pasid? I feel that they represent the same thing, that is, the address
space shared by mm to a device.

Best regards,
baolu

>
> This patch-set fills the gap by adding an mm_iommu field[1], whose type is
> mm_iommu_data struct, to replace the old pasid field. The introduced
> mm_iommu_data struct keeps info of both a reference list of sva domains
> and an assigned PASID.
>
>
> [1]: https://lore.kernel.org/linux-iommu/ZIBxPd1%2FJCAle6yP@nvidia.com/
>
>
> The RFC version of this patch-set is here:
> https://lore.kernel.org/linux-iommu/20230707013441.365583-1-tina.zhang@intel.com/
>
> Tina Zhang (5):
> iommu: Add mm_get_pasid() helper function
> iommu: Call helper function to get assigned pasid value
> mm: Add structure to keep sva information
> iommu: Support mm PASID 1:n with sva domains
> mm: Deprecate pasid field
>
> arch/x86/kernel/traps.c | 2 +-
> .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 12 ++---
> drivers/iommu/intel/svm.c | 8 +--
> drivers/iommu/iommu-sva.c | 50 ++++++++++++-------
> include/linux/iommu.h | 19 +++++--
> include/linux/mm_types.h | 3 +-
> kernel/fork.c | 1 -
> mm/init-mm.c | 3 --
> 8 files changed, 58 insertions(+), 40 deletions(-)
>