From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Justin Chen <justin.chen@broadcom.com>
Cc: "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
linux-serial@vger.kernel.org, opendmb@gmail.com,
"Al Cooper" <alcooperx@gmail.com>,
"Broadcom internal kernel review list"
<bcm-kernel-feedback-list@broadcom.com>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"John Ogness" <john.ogness@linutronix.de>,
"Jiaqing Zhao" <jiaqing.zhao@linux.intel.com>,
"open list:TTY LAYER" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] serial: 8250_bcm7271: improve bcm7271 8250 port
Date: Mon, 14 Aug 2023 18:12:59 +0300 [thread overview]
Message-ID: <ZNpEe+nmXGAkEbAb@smile.fi.intel.com> (raw)
In-Reply-To: <CALSSxFZyQCCupuXC7=z3yoO7xhVY3Grw_zFsdWKrE+txk9-S1Q@mail.gmail.com>
On Sat, Aug 12, 2023 at 09:24:21PM -0700, Justin Chen wrote:
> On Sat, Aug 12, 2023 at 3:50 AM Greg Kroah-Hartman
> <gregkh@linuxfoundation.org> wrote:
> > On Fri, Aug 11, 2023 at 03:14:01PM -0700, Justin Chen wrote:
> > > + [PORT_BCM7271] = {
> > > + .name = "bcm7271_uart",
This is badly named port type.
> > > + .fifo_size = 32,
> > > + .tx_loadsz = 32,
> > > + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
> > > + .rxtrig_bytes = {1, 8, 16, 30},
> > > + .flags = UART_CAP_FIFO | UART_CAP_AFE
> > > + },
> > > };
This is almost a dup of PORT_ALTR_16550_F32. Use it if you wish.
You can always rename it if it feels the right thing to do.
But why 8 and not 16 is the default rxtrig?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2023-08-14 15:13 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 22:14 [PATCH] serial: 8250_bcm7271: improve bcm7271 8250 port Justin Chen
2023-08-11 23:40 ` Florian Fainelli
2023-08-12 10:50 ` Greg Kroah-Hartman
2023-08-13 4:24 ` Justin Chen
2023-08-14 15:12 ` Andy Shevchenko [this message]
2023-08-14 16:28 ` Justin Chen
2023-08-14 18:09 ` Doug Berger
2023-08-15 6:43 ` Andy Shevchenko
2023-08-14 18:13 ` Doug Berger
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