[PATCH 5/6] pinctrl: sprd: Increase the range of register values

Linhua Xu
2023-08-25T03:38:49Z

As the UNISOC pin controller version iterates, more registers are required
to meet new functional requirements. Thus modify them.

Signed-off-by: Linhua Xu <Linhua.Xu@unisoc.com>
---
drivers/pinctrl/sprd/pinctrl-sprd.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/sprd/pinctrl-sprd.h b/drivers/pinctrl/sprd/pinctrl-sprd.h
index a696f81ce663..43b920f27bf9 100644
--- a/drivers/pinctrl/sprd/pinctrl-sprd.h
+++ b/drivers/pinctrl/sprd/pinctrl-sprd.h
@@ -9,17 +9,17 @@

struct platform_device;

-#define NUM_OFFSET (20)
-#define TYPE_OFFSET (16)
-#define BIT_OFFSET (8)
-#define WIDTH_OFFSET (4)
+#define NUM_OFFSET (22)
+#define TYPE_OFFSET (18)
+#define BIT_OFFSET (10)
+#define WIDTH_OFFSET (6)

#define SPRD_PIN_INFO(num, type, offset, width, reg) \
(((num) & 0xFFF) << NUM_OFFSET | \
((type) & 0xF) << TYPE_OFFSET | \
((offset) & 0xFF) << BIT_OFFSET | \
((width) & 0xF) << WIDTH_OFFSET | \
- ((reg) & 0xF))
+ ((reg) & 0x1F))

#define SPRD_PINCTRL_PIN(pin) SPRD_PINCTRL_PIN_DATA(pin, #pin)

@@ -30,7 +30,7 @@ struct platform_device;
.type = (((a) >> TYPE_OFFSET) & 0xf), \
.bit_offset = (((a) >> BIT_OFFSET) & 0xff), \
.bit_width = ((a) >> WIDTH_OFFSET & 0xf), \
- .reg = ((a) & 0xf) \
+ .reg = ((a) & 0x1f) \
}

enum pin_type {
--
2.17.1