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[31.46.246.162]) by smtp.gmail.com with ESMTPSA id f3-20020a5d6643000000b00318147fd2d3sm15254412wrw.41.2023.09.04.12.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Sep 2023 12:10:07 -0700 (PDT) Sender: Ingo Molnar Date: Mon, 4 Sep 2023 21:10:05 +0200 From: Ingo Molnar To: "Liang, Kan" Cc: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org, Stephane Eranian , Yunying Sun Subject: Re: [PATCH] perf/x86/uncore: Correct the number of CHAs on EMR Message-ID: References: <20230901142028.298051-1-kan.liang@linux.intel.com> <37afe50a-44f1-7fb1-c4c0-1e45c38c9a6d@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <37afe50a-44f1-7fb1-c4c0-1e45c38c9a6d@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Liang, Kan wrote: > > > On 2023-09-03 4:40 a.m., Ingo Molnar wrote: > > > > * kan.liang@linux.intel.com wrote: > > > >> From: Kan Liang > >> > >> The MSR UNC_CBO_CONFIG, which was used to detect the number of CHAs on > >> SPR, is broken on EMR XCC. It always returns 0. > >> > >> Roll back to the discovery method, which can give the correct number for > >> this case. > >> > >> Fixes: 38776cc45eb7 ("perf/x86/uncore: Correct the number of CHAs on SPR") > >> Reported-by: Stephane Eranian > >> Reported-by: Yunying Sun > >> Tested-by: Yunying Sun > >> Signed-off-by: Kan Liang > >> --- > >> arch/x86/events/intel/uncore_snbep.c | 4 +++- > >> 1 file changed, 3 insertions(+), 1 deletion(-) > >> > >> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c > >> index d49e90dc04a4..c41d7d46481c 100644 > >> --- a/arch/x86/events/intel/uncore_snbep.c > >> +++ b/arch/x86/events/intel/uncore_snbep.c > >> @@ -6475,7 +6475,9 @@ void spr_uncore_cpu_init(void) > >> type = uncore_find_type_by_id(uncore_msr_uncores, UNCORE_SPR_CHA); > >> if (type) { > >> rdmsrl(SPR_MSR_UNC_CBO_CONFIG, num_cbo); > >> - type->num_boxes = num_cbo; > >> + /* The MSR doesn't work on the EMR XCC. Roll back to the discovery method. */ > >> + if (num_cbo) > >> + type->num_boxes = num_cbo; > > > > So in the zero case we don't write type->num_boxes and leave it as-is. > > > > How does this fall back to the discovery method, is the existing (default?) > > value of type->num_boxes some special value? > > > > Starts from SPR, the basic uncore PMON information are retrieved from > the discovery table (resides in an MMIO space populated by BIOS.). It is > called the discovery method. The existing value of the type->num_boxes > is from the discovery table. > > On some SPR variants, there is a firmware bug. So the value from the > discovery table is incorrect. We use the value from > SPR_MSR_UNC_CBO_CONFIG to replace the one from the discovery table. > 38776cc45eb7 ("perf/x86/uncore: Correct the number of CHAs on SPR") > > Unfortunately, the SPR_MSR_UNC_CBO_CONFIG isn't available for the EMR > XCC (It works well for other EMR variants). But the above firmware bug > doesn't impact the EMR XCC. So this patch NOT lets the value from the > SPR_MSR_UNC_CBO_CONFIG replace the existing value from the discovery table. Thanks - the comment & changelog should probably reflect this background. Ingo