Re: [PATCH 09/17] m68k: Implement xor_unlock_is_negative_byte

Greg Ungerer
2023-09-20T07:16:12Z

On 20/9/23 01:57, David Laight wrote:
> From: Matthew Wilcox
>> Sent: 19 September 2023 16:47
>>
>> On Tue, Sep 19, 2023 at 03:22:25PM +0000, David Laight wrote:
>>>> Anyway, that's not the brief. We're looking to (eg) clear bit 0
>>>> and test whether bit 7 was set. So it's the sign bit of the byte,
>>>> not the sign bit of the int.
>>>
>>> Use the address of the byte as an int and xor with 1u<<24.
>>> The xor will do a rmw on the three bytes following, but I
>>> doubt that matters.
>>
>> Bet you a shiny penny that Coldfire takes an unaligned access trap ...
>
> and then the 'firmware' silently fixed it up for you a few 1000
> clocks later...
>
>> and besides, this is done on _every_ call to unlock_page(). That might
>> cross not only a cacheline boundary but also a page boundary. I cannot
>> believe that would be a high-performing solution. It might be just fine
>> on m68000 but I bet even by the 030 it's lower performing.
>
> I do remember managing to use 'cas2' to add an item to a linked list.
> But it is so painful so setup it was better just to disable interrupts.
> For non-smp that is almost certainly ok.
> (Unless the instructions are slow because of synchronisation.)
> Otherwise you need to use 'cas' on the aligned word.
> Assuming coldfire even has cas.

It doesn't. See CONFIG_CPU_HAS_NO_CAS in arch/m68k/Kconfig.cpu for how
m68k deals with ColdFire and early 68000 parts not having it.

Regards
Greg

>
> David
>
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