From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 031CEC00A8F for ; Tue, 24 Oct 2023 18:29:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344136AbjJXS3e (ORCPT ); Tue, 24 Oct 2023 14:29:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344111AbjJXS3c (ORCPT ); Tue, 24 Oct 2023 14:29:32 -0400 Received: from out-190.mta0.migadu.com (out-190.mta0.migadu.com [91.218.175.190]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E311A2 for ; Tue, 24 Oct 2023 11:29:30 -0700 (PDT) Date: Tue, 24 Oct 2023 18:29:23 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1698172168; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=RRSsi4LGt8MbQ4KLys+pDJGRcAZu1kNaXtLuROXhy8I=; b=o2ccfekA1HV281+lY8Y0GgD/IkzTQy9l7dRQ8lCqmeGVbXZztnbjZPYgWv0boTaT/0A0zU /qMVkE7LYziezD4yn/SxMSZSzRODCztlZNMqwe5H+fBmtZa30v4Mbk0X0wbaPufcOb1WUK 1WnpesWP8+SiqFIiCjXtUOqldYEa5pI= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Raghavendra Rao Ananta Cc: Marc Zyngier , Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v8 11/13] KVM: selftests: aarch64: vPMU register test for unimplemented counters Message-ID: References: <20231020214053.2144305-1-rananta@google.com> <20231020214053.2144305-12-rananta@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231020214053.2144305-12-rananta@google.com> X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 20, 2023 at 09:40:51PM +0000, Raghavendra Rao Ananta wrote: [...] > +#define INVALID_EC (-1ul) > +uint64_t expected_ec = INVALID_EC; > +uint64_t op_end_addr; > + > static void guest_sync_handler(struct ex_regs *regs) > { > uint64_t esr, ec; > > esr = read_sysreg(esr_el1); > ec = (esr >> ESR_EC_SHIFT) & ESR_EC_MASK; > - __GUEST_ASSERT(0, "PC: 0x%lx; ESR: 0x%lx; EC: 0x%lx", regs->pc, esr, ec); > + > + __GUEST_ASSERT(op_end_addr && (expected_ec == ec), > + "PC: 0x%lx; ESR: 0x%lx; EC: 0x%lx; EC expected: 0x%lx", > + regs->pc, esr, ec, expected_ec); > + > + /* Will go back to op_end_addr after the handler exits */ > + regs->pc = op_end_addr; This sort of game is exceedingly fragile, and actually causes the test to fail when I build it with clang. The test body is written in C, so you don't know if the label you've chosen as the return address is actually the next instruction after the sysreg access. A64 instructions are guaranteed to be 32 bit, so we can just increment PC by 4 here. -- Thanks, Oliver